TC55W800FT-55 Datasheet, PDF (6/13 Pages) Toshiba Semiconductor – 524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM

TC55W800FT-55,-70
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta = -40° to 85°C, V_DD = 2.3 to 3.3 V)
READ CYCLE
SYMBOL
PARAMETER
t_RC
t_ACC
t_CO1
t_CO2
t_OE
t_BA
t_COE
t_OEE
t_BE
t_OD
t_ODO
t_BD
t_OH
Read Cycle Time
Address Access Time
Chip Enable( CE1 ) Access Time
Chip Enable(CE2) Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold Time
TC55W800FT
-55
-70
MIN MAX MIN MAX
70
¾
85
¾
¾
70
¾
85
¾
70
¾
85
¾
70
¾
85
¾
35
¾
45
¾
35
¾
45
5
¾
5
¾
0
¾
0
¾
0
¾
0
¾
¾
30
¾
35
¾
30
¾
35
¾
30
¾
35
10
¾
10
¾
UNIT
ns
WRITE CYCLE
SYMBOL
PARAMETER
t_WC
t_WP
t_CW
t_BW
t_AS
t_WR
t_ODW
t_OEW
t_DS
t_DH
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Setup Time
Write Recovery Time
R/W Low to Output High-Z
R/W High to Output Active
Data Setup Time
Data Hold Time
TC55W800FT
-55
-70
MIN MAX MIN MAX
70
¾
85
¾
50
¾
55
¾
60
¾
70
¾
50
¾
55
¾
0
¾
0
¾
0
¾
0
¾
¾
30
¾
35
0
¾
0
¾
30
¾
35
¾
0
¾
0
¾
UNIT
ns
AC TEST CONDITIONS
PARAMETER
Output load
Input pulse level
Timing measurements
Reference level
t_R, t_F
TEST CONDITION
30 pF + 1 TTL Gate
V_DD - 0.2 V, 0.2 V
V_DD ´ 0.5
V_DD ´ 0.5
5 ns
2001-10-03 6/13