TC55W800FT-55 Datasheet, PDF (11/13 Pages) Toshiba Semiconductor – 524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM

TC55W800FT-55,-70
DATA RETENTION CHARACTERISTICS (Ta = -40° to 85°C)
SYMBOL
PARAMETER
MIN
V_DH
Data Retention Supply Voltage
1.5
I_DDS2
V_DH = 3.3 V Ta = -40~85°C
¾
Standby Current
Ta = -40~40°C
¾
V_DH = 3.0 V
Ta = -40~85°C
¾
t_CDR
t_R
Chip Deselect to Data Retention Mode Time
Recovery Time
0
t_RC(See ^Note)
Note: Read cycle time
TYP
¾
¾
¾
¾
¾
¾
MAX
3.3
10
1
5
¾
¾
UNIT
V
mA
ns
ns
CE1 CONTROLLED DATA RETENTION MODE ^{(See Note 1)}
V_DD
2.3 V
V_DD
DATA RETENTION MODE
V_IH
CE1
GND
(See Note 2)
t_CDR
V_DD - 0.2 V
CE2 CONTROLLED DATA RETENTION MODE ^{(See Note 3)}
V_DD
V_DD
2.3 V
CE2
V_IH
V_IL
GND
t_CDR
DATA RETENTION MODE
0.2 V
(See Note 2)
t_R
t_R
Note:
(1)
(2)
(3)
In CE1 controlled data retention mode, minimum standby current mode is entered when CE2 £ 0.2 V or
CE2 ³ VDD - 0.2 V.
When CE1 is operating at the VIH level, the operating current is given by IDDS1 during the transition
of VDD from 2.3 to 2.2V.
In CE2 controlled data retention mode, minimum standby current mode is entered when CE2 £ 0.2 V.
2001-10-03 11/13