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TC55W800FT-55 Datasheet, PDF (4/13 Pages) Toshiba Semiconductor – 524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM
TC55W800FT-55,-70
DC CHARACTERISTICS (Ta = -40° to 85°C, VDD = 2.3 to 3.3 V)
SYMBOL
PARAMETER
TEST CONDITION
MIN TYP MAX UNIT
IIL
IOH
IOL
ILO
lDDO1
lDDO2
Input Leakage
Current
VIN = 0 V~VDD
¾ ¾ ±1.0 mA
Output High Current
Output Low Current
Output Leakage
Current
VOH = VDD - 0.5 V
VOL = 0.4 V
CE1 = VIH or CE2 = VIL or R/W = VIL or OE = VIH,
VOUT = 0 V~VDD
-0.5 ¾
2.1 ¾
¾ mA
¾ mA
¾ ¾ ±1.0 mA
Operating Current
CE1 = VIL and CE2 = VIH and
R/W = VIH, IOUT = 0 mA,
Other Input = VIH/VIL,
BYTE = VDD or 0 V
CE1 = 0.2 V and CE2 = VDD - 0.2 V and
R/W = VDD - 0.2 V, IOUT = 0 mA,
Other Input = VDD - 0.2 V/0.2 V,
BYTE = VDD or 0 V
55 ns ¾ ¾ 60
tcycle 70 ns ¾ ¾ 50 mA
1 ms ¾ ¾ 10
55 ns ¾ ¾ 55
tcycle 70 ns ¾ ¾ 45 mA
1 ms ¾ ¾
5
IDDS1
IDDS2
(Note)
Standby Current
CE1 = VIH or CE2 = VIL, BYTE = VDD or 0 V
¾¾
2 mA
CE1 = VDD - 0.2 V
or CE2 = 0.2 V,
VDD = 1.5 V~3.3 V,
BYTE = VDD or 0 V
VDD =
Ta = 25°C
¾¾
1
3.0 V ± 10% Ta = -40~85°C ¾ ¾ 10
Ta = 25°C
¾ 0.05 0.5 mA
VDD = 3.0 V Ta = -40~40°C ¾ ¾
1
Ta = -40~85°C ¾ ¾
5
Note: In standby mode with CE1 ³ VDD - 0.2 V, these limits are assured for the condition CE2 ³ VDD - 0.2 V or CE2 £ 0.2 V.
CAPACITANCE (Ta = 25°C, f = 1 MHz)
SYMBOL
PARAMETER
TEST CONDITION
CIN
COUT
Input Capacitance
Output Capacitance
VIN = GND
VOUT = GND
Note: This parameter is periodically sampled and is not 100% tested.
MAX
10
10
UNIT
pF
pF
2001-10-03 4/13