TC9496AF Datasheet, PDF (43/48 Pages) Toshiba Semiconductor – 1 Chip Audio Digital Signal Processor

Microcontroller Interface
(1) Standard transmission mode ( CS , IFCK, IFDI, IFDO)
TC9496AF
Characteristics
Standby time
CS (fall)-IFCK (fall)
setup time
IFCK “L” cycle width
IFCK “H” cycle width
IFCK (rise)- CS (rise)
setup time
CS “H” cycle time
IFDI-IFCK (rise)
setup time
IFCK (rise)-IFDI
hold time
IFCK (fall)-IFDO
propagation delay time
Symbol
t_STB
t_CCD
t_WLC
t_WHC
t_CKC
t_WCS
t_SCD
Test
Circuit
¾
¾
¾
¾
¾
¾
¾
Test Condition
Min Typ. Max Unit
¾
1.0
¾
¾
ms
¾
0.2
¾
¾
ms
¾
0.25 ¾
¾
ms
¾
0.25 ¾
¾
ms
¾
0.2
¾
¾
ms
(Note 11) 0.5
¾
¾
ms
¾
0.2
¾
¾
ms
t_HCD
¾
¾
0.2
¾
¾
ms
t_DDO
¾ C_L = 30 pF
¾
¾
0.2
ms
Note 11: The command which is “Sync” in the transfer Sync with Sync signal of a 19 page table 1 control command
table needs to set the CS = H section to a minimum of 1 fs more until it transmits the follwing command.
(It needs more than 22.68 ms at fs = 44.1 KHz.)
(2) I²C mode ( CS , IFCK, IFDI)
Characteristics
IFCK clock frequency
IFCK "H" cycle width
IFCK "L" cycle width
Data setup time
Data hold time
Transmission start condition hold time
Repeat transmission start setup time
Transmission end condition setup
time
Data transmission interval
I²C rising time
I²C falling time
Symbol
t_IFCK
t_H
t_L
t_DS
t_DH
t_SCH
t_SCS
t_ECS
t_BUF
t_R
t_F
Test
Circuit
Test Condition
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
¾ C_L = 400 pF
Min Typ. Max Unit
0
¾ 400 kHz
0.6
¾
¾
ms
1.3
¾
¾
ms
0.1
¾
¾
ms
0
¾
¾
ms
0.6
¾
¾
ms
0.6
¾
¾
ms
0.6
¾
¾
ms
1.3
¾
¾
ms
¾
¾
0.3
ms
¾
¾
0.3
ms
43
2002-01-11