TMP89FS60 Datasheet, PDF (399/410 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP89FS60
Note 6: When the supply voltage VDD is less than 3.0V, the operating temperature Topr must be in a range of −20°C to 85°C.
25.5 Power-on Reset Circuit Characteristics
Power supply voltage (VDD)
Operating voltage
VPROFF
VPRON
Power-on reset signal
t VDD
Warm-up counter start
tPRON
tPPW
tPROFF
Warm-up counter clock
CPU and peripheral circuit
reset signal
tPWUP
Figure 25-6 Power-on Reset Operation Timing
Note: Care must be taken in system designing since the power-on reset circuit may not fulfill its functions due to the fluc-
tuations in the power supply voltage (V_DD).
Symbol
V_PROFF
V_PRON
t_PROFF
t_PRON
t_PRW
t_PWUP
t_VDD
Parameter
Power-on reset releasing voltage^Note
Power-on reset detecting voltage^Note
Power-on reset releasing response time
Power-on reset detecting response time
Power-on reset minimum pulse width
Warming-up time after a reset is cleared
Power supply rise time
(V_SS=0 V, Topr = −40 to 85°C)
Min.
Typ.
Max.
Unit
2.2
2.4
2.6
V
2.0
2.2
2.3
−
0.01
0.1
−
0.01
0.1
ms
1.0
−
−
−
102 x 2⁹/fc
−
s
−
−
5
ms
Note 1: Because the power-on reset releasing voltage and the power-on reset detecting voltage change relative to one another,
the detected voltage will never become inverted.
Note 2: A clock output by an oscillating circuit is used as the input clock for a warming-up counter. Because the oscillation fre-
quency does not stabilize until an oscillating circuit stabilizes, some errors may be included in the warming-up time.
Note 3: Boost the power supply voltage such that t_VDD becomes smaller that t_PWUP.
RA003
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