TMP1941AF Datasheet, PDF (328/354 Pages) Toshiba Semiconductor – 32-Bit TX System RISC

TMP1941AF
DMA Controller (9 of 16)
Mnemonic Name Address 7
6
5
4
3
2
1
0
SAC0
0
Source
address
count (bits
8 & 7)
00: Incre-
mented
01: Decre-
mented
1x: Fixed
DIO
0
Destination
(I/O)
0: Memory
1: I/O
DAC1
DAC0
TrSiz1
R/W
0
0
0
Destination address
count
00: Incremented
01: Decremented
1x: Fixed
Transfer size
0x: 32 bits
10: 16 bits
11: 8 bits
TrSiz0
0
DPS1
DPS0
0
0
Device port size
0x: 32 bits
10: 16 bits
11: 8 bits
15
14
13
12
11
10
9
8
CCR2
DMA
Channel
Control
Register 2

0
Must be
written as
0.
FFFF
E240H
ExR
PosE
0
External
request
mode
1: External
transfer
request
0: Internal
transfer
request
0
Must be
written as
0.
Lev
SReq
R/W
0
0
Must be
written as
1.
Snoop
request
0: Disabled
1: Enabled
RelEn
0
Bus
release
request
enable
0: Disabled
1: Enabled
SIO
0
Source
(I/O)
0: Memory
1: I/O
SAC1
0
Source
address
count (bits
8 & 7)
00: Incre-
mented
01: Decre-
mented
1x: Fixed
23
22
21
20
19
18
17
16
NIEn
AbIEn

1
Normal
completion
interrupt
enable
0: Disabled
1: Enabled
1
Abnormal
termination
interrupt
enable
0: Disabled
1: Enabled
1
Must be
written as
0.


R/W
0
0
Must be
written as
0.
Must be
written as
0.

0
Must be
written as
0.
Big
1
Must be
written as
0.

0
Must be
written as
0.
31
30
29
28
27
26
25
24
Str







W






W
0
0
0
0
0
0
0
0
1: Channel
2 start
Must be
written as
0.
TMP1941AF-288
2003-03-27