TMP1941AF Datasheet, PDF (124/354 Pages) Toshiba Semiconductor – 32-Bit TX System RISC

10. DMA Controller (DMAC)
The TMP1941AF contains a four-channel DMA controller.
TMP1941AF
10.1 Features
The TMP1941AF DMAC has the following features:
(1) Four independent DMA channels
(2) Two types of bus requests, with and without bus snooping
(3) Transfer requests:
Internal transfer requests: Software initiated
External transfer requests: Hardware signals from on-chip peripherals and external interrupt pins
(4) Dual-address mode
(5) Memory-to-memory, memory-to-I/O, and I/O-to-memory transfers
(6) Transfer width:
• Memory: 32-bit (8-bit and 16-bit memory devices are supported through the programming of the
CS/Wait Controller.)
• I/O peripherals: 8-, 16-, and 32-bit
(7) Address pointers can increment, decrement or remain constant. The user can program the bit positions
at which address incrementation or decrementation occurs.
(8) Fixed channel priority
TMP1941AF-84
2003-03-27