SSM6J502NU_14 Datasheet, PDF (2/6 Pages) Toshiba Semiconductor – TOSHIBA Field Effect Transistor Silicon P Channel MOS Type(U-MOSVI)

Electrical Characteristics (Ta = 25°C)
SSM6J502NU
Characteristic
Symbol
Test Conditions
Min Typ. Max Unit
Drain-Source breakdown voltage
Drain cut-off current
Gate leakage current
Gate threshold voltage
Forward transfer admittance
Drain–source ON-resistance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Switching time
Turn-on time
Turn-off time
Drain-Source forward voltage
V _{(BR) DSS} I_D = -1 mA, V_GS = 0 V
V _{(BR) DSX} I_D = -1 mA, V_GS = 5 V
-20
―
―
V
(Note 4) -15
―
―
I_DSS
V_DS = -20 V, V_GS = 0 V
―
―
-1
μA
I_GSS
V_GS = ±8 V, V_DS = 0 V
―
―
±1
μA
V_th
V_DS = -3 V, I_D = -1 mA
-0.3
―
-1.0
V
|Y_fs|
V_DS = -3 V, I_D = -2.0 A
(Note 3) 8.8 17.5 ―
S
I_D = -4.0 A, V_GS = -4.5 V
(Note 3) ― 18.2 23.1
R_{DS (ON)}
I_D = -4.0 A, V_GS = -2.5 V
I_D = -2.5 A, V_GS = -1.8 V
(Note 3) ―
(Note 3) ―
21.5 28.3
mΩ
26.1 38.4
I_D = -1.5 A, V_GS = -1.5 V
(Note 3) ― 29.7 60.5
C_iss
― 1800 ―
C_oss
V_DS = -10 V, V_GS = 0 V, f = 1 MHz
― 205 ―
pF
C_rss
― 190 ―
Q_g
Q_gs1
Q_gd
V_DD = −10 V, I_D = −4.4 A
V_GS = −4.5 V
― 24.8 ―
―
0.8
―
nC
―
6.8
―
t_on
V_DD = -10 V, I_D = -1.5 A,
t_off
V_GS = 0 to -2.5 V, R_G = 4.7 Ω
―
25
―
ns
― 133 ―
V_DSF
I_D = 4 A, V_GS = 0 V
(Note 3) ―
0.7 1.2
V
Note 3: Pulse test
Note 4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode.
Note that the drain-source breakdown voltage is lowered in this mode
Switching Time Test Circuit
(a) Test circuit
0
IN
−2.5 V
10 μs
OUT
V_DD = −10 V
R_G = 4.7 Ω
Duty ≤ 1%
V_IN: t_r, t_f < 5 ns
Common source
Ta = 25°C
V_DD
(b) V_IN
0V
(c) V_OUT
−2.5 V
V_{DS (ON)}
V_DD
90%
10%
90%
10%
t_r
t_f
Precaution
t_on
t_off
Let V_th be the voltage applied between gate and source that causes the drain current (I_D) to be low (-1 mA for the
SSM6J502NU). Then, for normal switching operation, V_GS(on) must be higher than V_th, and V_GS(off) must be lower than
V_th. This relationship can be expressed as: V_GS(off) < V_th < V_GS(on).
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance R_{th (ch-a)} and power dissipation P_D vary depending on board material, board area, board thickness
and pad area. When using this device, please take heat dissipation into consideration
2
2014-03-01