SSM3J134TU_14 Datasheet, PDF (2/6 Pages) Toshiba Semiconductor – TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSVI)

SSM3J134TU
Electrical Characteristics (Ta = 25°C)
Characteristic
Symbol
Test Conditions
Min Typ. Max Unit
Drain-source breakdown voltage
V _{(BR) DSS} I_D = -1 mA, V_GS = 0 V
V _{(BR) DSX} I_D = -1 mA, V_GS = 5 V
-20
⎯
⎯
V
.(Note 4) -15
⎯
⎯
V
Drain cut-off current
I_DSS V_DS = -20 V, V_GS = 0 V
⎯
⎯
-1
μA
Gate leakage current
I_GSS V_GS = ±8 V, V_DS = 0 V
⎯
⎯
±1
μA
Gate threshold voltage
V_th
V_DS = -3 V, I_D = -1 mA
-0.3
⎯
-1.0
V
Forward transfer admittance
⏐Y_fs⏐ V_DS = -3 V, I_D = -1.0 A
(Note 3) 2.9
5.8
⎯
S
I_D = -1.5 A, V_GS = -4.5 V
(Note 3) ⎯ 78.5 93
Drain–source ON-resistance
R_{DS (ON)} ^{ID = -1.0 A, VGS = -2.5 V}
I_D = -0.5 A, V_GS = -1.8 V
(Note 3) ⎯ 97.5 123
mΩ
(Note 3) ⎯
120 168
I_D = -0.25 A, V_GS = -1.5 V (Note 3) ⎯
141 240
Input capacitance
Output capacitance
Reverse transfer capacitance
C_iss
C_oss
C_rss
V_DS = -10 V, V_GS = 0 V
f = 1 MHz
⎯
290
⎯
⎯
44
⎯
pF
⎯
32
⎯
Switching time
Turn-on time
Turn-off time
t_on
V_DD = -10 V, I_D = -0.5 A
t_off
V_GS = 0 to -2.5 V, R_G = 4.7 Ω
⎯
12
⎯
ns
⎯ 46.2 ⎯
Total gate charge
Gate-source charge
Gate-drain charge
Q_g
Q_gs1
Q_gd
V_DD = -10 V, I_D = -2.0 A,
V_GS = -4.5 V
⎯
4.7
⎯
⎯
0.4
⎯
nC
⎯
1.0
⎯
Drain-source forward voltage
V_DSF I_D = 3.2 A, V_GS = 0 V
(Note 3) ⎯
0.9 1.2
V
Note 3: Pulse test
Note 4: If a forward bias is applied between gate and source, this device enters V_(BR)DSX mode. Note that the
drain-source breakdown voltage is lowered in this mode.
Switching Time Test Circuit
(a) Test Circuit
0
IN
OUT
−2.5V
10 μs
V_DD = －10 V
R_G = 4.7 Ω
Duty ≤ 1%
V_IN: t_r, t_f < 5 ns
Common Source
Ta = 25°C
R_L
V_DD
(b) V_IN
0V
(c) V_OUT
−2.5 V
V_{DS (ON)}
V_DD
90%
10%
90%
10%
t_r
t_f
t_on
t_off
Notice on Usage
V_th can be expressed as the voltage between gate and source when the low operating current value is I_D = -1 mA for
this product. For normal switching operation, V_{GS (on)} requires a higher voltage than V_th and V_{GS (off)} requires a lower
voltage than V_th. (The relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on).})
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance R_{th (ch-a)} and power dissipation P_D vary depending on board material, board area, board thickness
and pad area. When using this device, please take heat dissipation into consideration
2
2014-03-01