SSM3J108TU Datasheet, PDF (2/5 Pages) Toshiba Semiconductor – Field Effect Transistor Silicon P-Channel MOS Type High Speed Switching Applications

Switching Time Test Circuit
(a) Test circuit
0
IN
−2.5V
10 μs
V_DD = -10 V
R_G = 4.7 Ω
D.U. ^<= 1%
V_IN: t_r, t_f < 5 ns
Common Source
Ta = 25°C
OUT
R_L
V_DD
SSM3J108TU
(b) V_IN
0V
(c) V_OUT
−2.5 V
V_{DS (ON)}
V_DD
10%
90%
90%
10%
t_r
t_f
t_on
t_off
Marking
3
Equivalent Circuit (top view)
3
JJ1
1
2
1
2
Precaution
V_th can be expressed as the voltage between gate and source when the low operating current value is I_D=−1mA for
this product. For normal switching operation, V_{GS (on)} requires a higher voltage than V_th, and V_{GS (off)} requires a lower
voltage than V_th.
(The relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on)})
Take this into consideration when using the device.
Handling Precaution
When handling individual devices which are not yet mounted on a circuit board, be sure that the environment is
protected against electrostatic discharge. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
2
2007-11-01