TA1241ANG Datasheet, PDF (16/30 Pages) Toshiba Semiconductor – DEFLECTION PROCESSOR IC FOR TVs

No.
CHARACTERISTIC
12
Vertical Linearity Maximum
Correction
TA1241ANG
SYMBOL
V_L
UNIT
%
ELECTRICAL
CHARACTERISTICS
LIMITS
MIN TYP. MAX
TEST METHOD (CONDITIONS V_CC = 9 V, Ta = 25±3°C)
BUS DATA AND SWITCHING MODE
[ ] ; SUBADDRESS, ( ) ; DATA
TEST METHOD
(1) Set the data of subaddress [06] to (3F). Set the
data of subaddress [05] to (3F). Change the
subaddress [08] data so that the TP5 parabola
waveform is symmetrical.
(2) Set the data of subaddress [06] to (00). Set the
data of subaddress [05] to (20).
±10.0
±12.5
±15.0
[08] adjustment, all SW-A
[01] (00) (10) (1F)
(3) When set the data of subaddress [01] to (10),
measure the TP7 waveform V₁ (10) and V₂ (10)
(4) Likewise, when set the data of subaddress [01] to
(00) and (1F), measure V₁ (00), V₂ (00), V₁ (1F),
and V₂ (1F).
VL
=
±
V1(00) −V1(1F) +V2(1F) −V2(00)
2 × [V1(10) +V2(10)]
× 100
Note: Unless otherwise specified in the bus data and SW mode column, use PRESET values
and SW-A.
16
2005-08-18