TMP92CD54I Datasheet, PDF (158/343 Pages) Toshiba Semiconductor – 32-bit Micro-controller

Serial Bus Interface 1 Baud Rate Regster 0
7
6
5
4
3
2
SBI1BR0 ^{Bit Symbol}
-
I2SBI0
-
-
-
-
(017CH) Read/W rite
W
R/W
Prohibit
After Reset
0
0
-
-
-
-
Read-
(Note)
IDLE2
modify-write _Function ^{Fixed to “0”} _{0: Stop}
1: Run
TMP92CD54I
1
0
-
-
-
-
SBI1BR1
(017DH)
Bit symbol
Read/W rite
After Reset
Function
7
P4MON/
P4EN
R/W
0
Internal
clock
0: Stop
1: Operate
Operation during IDLE 2 Mode
0 Stop
1 Operate
Serial Bus Interface 1 Baud Rate Register 1
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Baud rate clock control
0 Stop
1 Operate
Sirial Bus Interface 1 Data Buffer Register
7
6
5
4
3
2
SBI1DBR ^{Bit symbol RB7/TB7 RB6/TB6 RB5/TB5 RB4/TB4 RB3/TB3 RB2/TB2}
(0179H) Read/W rite
R (received)/W (transfer)
Prohibit
After Reset
Undefined
Read-
modify-write _{Note: W hen writing transmitted data, start from the MSB (bit 7).}
1
RB1/TB1
0
RB0/TB0
I2C1AR ^{Bit Symbol}
(017AH) Read/W rite
Prohibit
After Reset
Read-
modify-write _Function
I²C Bus 1 Address Register
7
6
5
4
3
2
1
SA6
SA5
SA4
SA3
SA2
SA1
SA0
W
0
0
0
0
0
0
0
Slave address selection for when device is operating as slave device
0
ALS
0
Addressing
or free data
format
Address recognition mode specification
0 Addressing format
1 Free data format
Addressing or free data format impact both slave and master configuration.
When addressing format is used (<ALS>=0), TRX bit is updated relying on R/W bit (=8^th bit of first
received byte after start condition). Moreover in slave mode, MCU spies the bus after start condition to
recognize its address.
When free data format is used (<ALS>=1) all words on the bus are considered as data words, that
means no address recognition is done and TRX is not updated.
Figure 3.10.10 Registers for the I²C Bus Mode
92CD54I-158
2006-01-27