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TMP92CD54I Datasheet, PDF (122/343 Pages) Toshiba Semiconductor – 32-bit Micro-controller
3.9.1 Block diagrams
TMP92CD54I
prescaler
φT0
2 4 8 16 32 64
φT2 φT8 φT32
Serial clock generation circuit
BR0CR
<BR0CK1, 0>
T0TRG
(from timer 0)
BR0CR
BR0ADD
<BR0S3 to 0> <BR0K3 to 0>
φT0
φT2
φT8
φT32
UART
Mode
SIOCLK
φ1(fC/2)
BR0CR
<BR0ADDE>
Baud rate
generator
SC0MOD0 SC0MOD0
<SC1, 0>
<SM1, 0>
SCLK0
shared
with PF2
SCLK0
shared
with PF2
RXD0
shared
with PF1
÷2
I/O
interface mode
I/O Interface Mode
SC0CR
<IOC>
Receive
Counter
(UART only ÷ 16)
RXDCLK
SC0MOD0
<RXE>
Receive
Control
SC0MOD0 Serial channel
<WU> interrupt
control
SC0CR
<PE> <EVEN>
Receive Buffer1 (shift register)
Parity control
Transmision
counter
(UART only ÷ 16)
INT request
INTRX0
INTTX0
TXDCLK
Transmission
Control
SC0MOD0
<CTSE>
CTS0
shared
with PF2
RB8 Receive Buffer2 (SC0BUF)
Error flag
SC0CR
<OERR><PERR><FERR>
TB8
Transmission Buffer
TXD0
shared
with PF0
Internal bus
Figure 3.9.2 Block diagram of the Serial Channel 0
92CD54I-122
2006-01-27