TMS320F28069PZS Datasheet, PDF (93/173 Pages) Texas Instruments – Piccolo Microcontrollers

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5.10.2 ADC MUX
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
To COMPy A or B input
To ADC Channel X
AIOx Pin
AIOxIN
AIOxINE
Logic implemented in GPIO MUX block
SYSCLK
1
SYNC
AIODAT Reg
(Read)
0
AIOMUX 1 Reg
AIODAT Reg
(Latch)
AIOSET,
AIOCLEAR,
AIOTOGGLE
Regs
1
(0 = Input, 1 = Output)
0
0
AIODIR Reg
(Latch)
Figure 5-23. AIOx Pin Multiplexing
The ADC channel and Comparator functions are always available. The digital I/O function is available only
when the respective bit in the AIOMUX1 register is 0. In this mode, reading the AIODAT register reflects
the actual pin state.
The digital I/O function is disabled when the respective bit in the AIOMUX1 register is 1. In this mode,
reading the AIODAT register reflects the output latch of the AIODAT register and the input digital I/O buffer
is disabled to prevent analog signals from generating noise.
On reset, the digital function is disabled. If the pin is used as an analog input, users should keep the AIO
function disabled for that pin.
Copyright © 2010–2012, Texas Instruments Incorporated
Peripheral and Electrical Specifications
93
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TMS320F28064 TMS320F28063 TMS320F28062