MSP430P325A Datasheet, PDF (9/35 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430C32x, MSP430P325A
MIXED SIGNAL MICROCONTROLLER
SLAS219B − MARCH 1999 − REVISED MARCH 2000
peripherals
Peripherals connect to the CPU through data, address, and control busses and can be handled easily with all
instructions for memory manipulation.
peripheral file map
Watchdog
ADC
PERIPHERALS WITH WORD ACCESS
Watchdog Timer control
WDTCTL
Data register
Reserved
Control register
Input enable register
Input register
ADAT
ACTL
AEN
AIN
0120h
0118h
0116h
0114h
o112h
0110h
PERIPHERALS WITH BYTE ACCESS
EPROM
EPROM control
EPCTL
Crystal buffer
Crystal buffer control
CBCTL
System clock
SCG frequency control
SCG frequency integrator
SCG frequency integrator
SCFQCTL
SCFI1
SCFI0
Timer/Port
Timer/Port enable
Timer/Port data
Timer/Port counter2
Timer/Port counter1
Timer/Port control
TPE
TPD
TPCNT2
TPCNT1
TPCTL
8-Bit Timer/Counter
8-Bit Timer/Counter data
8-Bit Timer/Counter preload
8-Bit Timer/Counter control
TCDAT
TCPLD
TCCTL
Basic Timer1
Basic Timer counter2
Basic Timer counter1
Basic Timer control
BTCNT2
BTCNT1
BTCTL
LCD
LCD memory 15
:
LCD memory 1
LCD control & mode
LCDM15
:
LCDM1
LCDCTL
Port P0
Port P0 interrupt enable
Port P0 interrupt edge select
Port P0 interrupt flag
Port P0 direction
Port P0 output
Port P0 input
P0IE
P0IES
P0IFG
P0DIR
P0OUT
P0IN
Special function
SFR interrupt flag2
SFR interrupt flag1
SFR interrupt enable2
SFR interrupt enable1
IFG2
IFG1
IE2
IE1
054h
053h
052h
051h
050h
04Fh
04Eh
04Dh
04Ch
04Bh
044h
043h
042h
047h
046h
040h
03Fh
:
031h
030h
015h
014h
013h
012h
011h
010h
003h
002h
001h
000h
oscillator and system clock
Two clocks are used in the system, the system (master) clock (MCLK) and the auxiliary clock (ACLK). The MCLK
is a multiple of the ACLK. The ACLK runs with the crystal oscillator frequency. The special design of the oscillator
supports the feature of low current consumption and the use of a 32 768 Hz crystal. The crystal is connected
across two terminals without any other external components being required.
The oscillator starts after applying VCC, due to a reset of the control bit (OscOff) in the status register (SR). It
can be stopped by setting the OscOff bit to a 1. The enabled clock signals ACLK, ACLK/2, ACLK/4, or MCLK
are accessible for use by external devices at output terminal XBUF.
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