DS90CR583_13 Datasheet, PDF (9/13 Pages) Texas Instruments – LVDS 24-Bit Color Flat Panel Display (FPD) Link- 65 MHz

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OBSOLETE
DS90CR583, DS90CR584
SNLS110B – JULY 1997 – REVISED APRIL 2013
Figure 15. Transmitter LVDS Output Pulse Position Measurement
SW—Setup and Hold Time (Internal Data Sampling Window)
TCCS—Transmitter Output Skew
RSKM ≥ Cable Skew (type, length) + Source Clock Jitter (cycle to cycle)
Cable Skew—typically 10 ps–40 ps per foot
Figure 16. Receiver LVDS Input Skew Margin
Figure 17. Seven Bits of LVDS in One Clock Cycle
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