DS90CR583_13 Datasheet, PDF (11/13 Pages) Texas Instruments – LVDS 24-Bit Color Flat Panel Display (FPD) Link- 65 MHz

OBSOLETE
DS90CR583, DS90CR584
www.ti.com
Pin Name
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
SNLS110B – JULY 1997 – REVISED APRIL 2013
DS90CR583 Pin Descriptions—FPD Link Transmitter (continued)
I/O No.
I 1 Power supply pin for PLL
I 2 Ground pins for PLL
I 1 Power supply pin for LVDS outputs
I 3 Ground pins for LVDS outputs
Description
Pin Name
RxIN+
RxIN−
RxOUT
RxCLK IN+
RxCLK IN−
FPSHIFT OUT
PWR DOWN
V_CC
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
DS90CR584 Pin Descriptions—FPD Link Receiver
I/O No.
Description
I 4 Positive LVDS differential data inputs
I 4 Negative LVDS differential data inputs
O 28 TTL level data outputs. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines—FPLINE, FPFRAME,
DRDY and CNTL (also referred to as HSYNC, VSYNC, Data Enable, CNTL)
I 1 Positive LVDS differential clock input
I 1 Negative LVDS differential clock input
O 1 TTL level clock output. The falling edge acts as data strobe
I 1 TTL level input. Assertion (low input) maintains the receiver outputs in the previous state
I 4 Power supply pins for TTL outputs
I 5 Ground pins for TTL outputs
I 1 Power supply for PLL
I 2 Ground pin for PLL
I 1 Power supply pin for LVDS inputs
I 3 Ground pins for LVDS inputs
Connection Diagram
Figure 21. 56 Pin TSSOP
See Package Number DGG
Figure 22. 56 Pin TSSOP
See Package Number DGG
Copyright © 1997–2013, Texas Instruments Incorporated
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