AMC1303E0510 Datasheet, PDF (9/40 Pages) Texas Instruments – Small, High-Precision, Reinforced Isolated Delta-Sigma Modulators with Internal Clock

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AMC1303E0510, AMC1303M0510, AMC1303E0520, AMC1303M0520
AMC1303E2510, AMC1303M2510, AMC1303E2520, AMC1303M2520
SBAS771 – JUNE 2017
7.10 Switching Characteristics
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
f_CLK
Duty
Cycle
Internal clock frequency,
on the CLKOUT pin of the AMC1303Mx
only
Internal clock duty cycle⁽¹⁾,
on the CLKOUT pin of the AMC1303Mx
only
AMC1303Mxx10
AMC1303Mxx20
t_h
DOUT hold time after rising edge of
CLKOUT
AMC1303Mx, C_LOAD = 15 pF
t_d
DOUT delay time after rising edge of
CLKOUT
AMC1303Mx, C_LOAD = 15 pF
t_r
DOUT, CLKOUT rise time
t_f
DOUT, CLKOUT fall time
t_ASTART Analog startup time
10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V,
C_LOAD = 15 pF
10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V,
C_LOAD = 15 pF
90% to 10%, 2.7 V ≤ DVDD ≤ 3.6 V,
C_LOAD = 15 pF
90% to 10%, 4.5 V ≤ DVDD ≤ 5.5 V,
C_LOAD = 15 pF
AVDD step to 3.0 V with DVDD ≥ 2.7 V
(1) Duty cycle values are specified by design.
MIN
9.6
19.2
45%
7
TYP
10
20
50%
0.8
1.8
0.8
1.8
0.5
MAX
10.4
20.8
UNIT
MHz
55%
ns
15 ns
3.5
ns
3.9
3.5
ns
3.9
ms
CLKOUT
(AMC1303Mx)
th
td
tr / tf
DOUT
(AMC1303Mx)
DOUT
(AMC1303Ex)
Figure 1. AMC1303Mx Digital Interface Timing
AVDD
DVDD
CLKOUT
(AMC1303Mx)
DOUT
tASTART
...
tASTART
...
2 cycles
256 cycles
µ1¶
...
Bitream not valid
Valid bitstream
µ0¶
Bitream not valid
Valid bitstream
µ1¶
Figure 2. Digital Interface Startup Timing
Copyright © 2017, Texas Instruments Incorporated
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