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ADS8556 Datasheet, PDF (9/47 Pages) Texas Instruments – 16-14-12-Bit Six-Channel Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTERS
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ADS8556, ADS8557, ADS8558
SBAS404D – OCTOBER 2006 – REVISED FEBRUARY 2016
Electrical Characteristics: General (continued)
over recommended operating free-air temperature range of –40°C to 125°C, AVDD = 4.5 V to 5.5 V, BVDD = 2.7 V to 5.5 V,
HVDD = 10 V to 15 V, HVSS = –15 V to –10 V, VREF = 2.5 V (internal), and fDATA = maximum (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX UNIT
REFERENCE VOLTAGE OUTPUT (REFOUT)
2.5-V operation, REFDAC = 0x3FF
2.485
2.5
2.515
VREF
Reference voltage
2.5-V operation, REFDAC = 0x3FF at 25°C
3-V operation, REFDAC = 0x3FF
2.496
2.5
2.985
3.0
2.504
V
3.015
3-V operation, REFDAC = 0x3FF at 25°C
2.995
3.0
3.005
dVREF/dT Reference voltage drift
PSRR
Power-supply rejection ratio
±10
ppm/°C
73
dB
IREFOUT
IREFSC
tREFON
Output current
Short-circuit current(2)
Turn-on settling time
External load capacitance
With dc current
At CREF_x pins
At REFIO pins
–2
50
10
4.7
10
100
470
2 mA
mA
ms
μF
REFDAC Tuning range
REFDAC resolution
Internal reference output voltage range
0.2 × VREF
10
VREF
V
Bits
DNLDAC REFDAC differential nonlinearity
INLDAC
REFDAC integral nonlinearity
VOSDAC
REFDAC offset error
REFERENCE VOLTAGE INPUT (REFIN)
VREFIN
Reference input voltage
Input resistance
VREF = 0.5 V (DAC = 0x0CC)
–1
±0.1
–2
±0.1
–4
±0.65
0.5
2.5
100
1 LSB
2 LSB
4 LSB
3.025
V
MΩ
Input capacitance
5
pF
Reference input current
1
μA
SERIAL CLOCK INPUT (SCLK)
fSCLK
Serial clock input frequency
tSCLK
Serial clock period
Serial clock duty cycle
DIGITAL INPUTS(3)
0.1
0.0278
40%
36
10
60%
MHz
μs
Logic family
CMOS with Schmitt-Trigger
High-level input voltage
0.7 × BVDD
BVDD + 0.3
V
Low-level input voltage
BGND – 0.3
0.3 × BVDD
V
Input current
Input capacitance
DIGITAL OUTPUTS(3)
VI = BVDD to BGND
–50
5
50
nA
pF
Logic family
CMOS
High-level output voltage
Low-level output voltage
High-impedance-state output
current
IOH = 100 μA
IOH = –100 μA
BVDD – 0.6
BGND
–50
BVDD
V
BGND + 0.4
V
50
nA
Output capacitance
5
pF
Load capacitance
30
pF
(2) Reference output current is not limited internally.
(3) Specified by design.
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