LM3S5R36 Datasheet, PDF (899/1062 Pages) Texas Instruments – Stellaris® LM3S5R36 Microcontroller

Stellaris^® LM3S5R36 Microcontroller
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they are enabled to cause an interrupt to be asserted to the interrupt controller. The fault interrupt
is asserted based on the fault condition source that is specified by the PWMnCTL, PWMnFLTSRC0
and PWMnFLTSRC1 registers. The fault interrupt is latched on detection and must be cleared
through the PWM Interrupt Status and Clear (PWMISC) register. The actual value of the FAULTn
signals can be observed using the PWMSTATUS register.
The PWM generator interrupts simply reflect the status of the PWM generators and are cleared via
the interrupt status register in the PWM generator blocks. If a bit is set, the event is active; if a bit
is clear the event is not active.
PWM Raw Interrupt Status (PWMRIS)
PWM0 base: 0x4002.8000
Offset 0x018
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
INTFAULT3 INTFAULT2 INTFAULT1 INTFAULT0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
INTPWM3 INTPWM2 INTPWM1 INTPWM0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:20
19
18
Name
reserved
INTFAULT3
INTFAULT2
Type
RO
RO
RO
Reset
0x000
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt Fault PWM 3
Value Description
1 The fault condition for PWM generator 3 is asserted.
0 The fault condition for PWM generator 3 has not been asserted.
This bit is cleared by writing a 1 to the INTFAULT3 bit in the PWMISC
register.
Interrupt Fault PWM 2
Value Description
1 The fault condition for PWM generator 2 is asserted.
0 The fault condition for PWM generator 2 has not been asserted.
This bit is cleared by writing a 1 to the INTFAULT2 bit in the PWMISC
register.
January 21, 2012
899
Texas Instruments-Production Data