MSP430F5522 Datasheet, PDF (84/123 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526
MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
SLAS590L – MARCH 2009 – REVISED MAY 2013
Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger
P3REN.x
Pad Logic
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P3DIR.x
From module
P3OUT.x
From module
P3SEL.x
P3IN.x
To module
0
1
0
1
EN
D
Direction
0: Input
1: Output
DV_SS
0
DV_CC
1
1
P3DS.x
0: Low drive
1: High drive
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
P3.5/TB0.5
P3.6/TB0.6
P3.7/TB0OUTH/SVMOUT
Table 51. Port P3 (P3.0 to P3.7) Pin Functions
PIN NAME (P3.x)
x
FUNCTION
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
P3.5/TB0.5 ⁽⁵⁾
P3.6/TB0.6 ⁽⁵⁾
P3.7/TB0OUTH/SVMOUT ⁽⁵⁾
0 P3.0 (I/O)
UCB0SIMO/UCB0SDA^{(2) (3)}
1 P3.1 (I/O)
UCB0SOMI/UCB0SCL^{(2) (3)}
2 P3.2 (I/O)
UCB0CLK/UCA0STE^{(2) (4)}
3 P3.3 (I/O)
UCA0TXD/UCA0SIMO ⁽²⁾
4 P3.4 (I/O)
UCA0RXD/UCA0SOMI ⁽²⁾
5 P3.5 (I/O)
TB0.CCI5A
TB0.5
6 P3.6 (I/O)
TB0.CCI6A
TB0.6
7 P3.7 (I/O)
TB0OUTH
SVMOUT
CONTROL BITS/SIGNALS⁽¹⁾
P3DIR.x
P3SEL.x
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
0
1
1
1
I: 0; O: 1
0
0
1
1
1
I: 0; O: 1
0
0
1
1
1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) If the I2C functionality is selected, the output drives only the logical 0 to V_SS level.
(4) UCB0CLK function takes precedence over UCA0STE function. If the pin is required as UCB0CLK input or output, USCI A0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(5) F5529, F5527, F5525, F5521, F5519, F5517, F5515 devices only.
84
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