MSP430F5522 Datasheet, PDF (34/123 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526
MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
SLAS590L – MARCH 2009 – REVISED MAY 2013
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TB0 (Link to User's Guide)
TB0 is a 16-bit timer and counter (Timer_B type) with seven capture/compare registers. It can support multiple
capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities. Interrupts may
be generated from the counter on overflow conditions and from each of the capture/compare registers.
INPUT PIN NUMBER
RGC, YFF,
ZQE ⁽¹⁾
PN
60-P7.7
60-P7.7
55-P5.6
DEVICE
INPUT
SIGNAL
TB0CLK
ACLK
(internal)
SMCLK
(internal)
TB0CLK
TB0.0
Table 17. TB0 Signal Connections
MODULE
INPUT
SIGNAL
TBCLK
MODULE
BLOCK
MODULE
OUTPUT
SIGNAL
DEVICE
OUTPUT
SIGNAL
ACLK
Timer
NA
NA
SMCLK
TBCLK
CCI0A
55-P5.6
TB0.0
CCI0B
CCR0
TB0
56-P5.7
DV_SS
DV_CC
TB0.1
GND
V_CC
CCI1A
CBOUT
(internal)
CCI1B
CCR1
TB1
57-P7.4
DV_SS
DV_CC
TB0.2
GND
V_CC
CCI2A
57-P7.4
TB0.2
CCI2B
CCR2
TB2
DV_SS
GND
DV_CC
V_CC
58-P7.5
TB0.3
CCI3A
58-P7.5
TB0.3
CCI3B
CCR3
TB3
DV_SS
GND
DV_CC
V_CC
59-P7.6
TB0.4
CCI4A
59-P7.6
TB0.4
CCI4B
CCR4
TB4
DV_SS
GND
DV_CC
V_CC
42-P3.5
TB0.5
CCI5A
42-P3.5
TB0.5
CCI5B
CCR5
TB5
DV_SS
GND
DV_CC
V_CC
43-P3.6
TB0.6
CCI6A
ACLK
(internal)
CCI6B
CCR6
TB6
DV_SS
GND
DV_CC
V_CC
(1) Timer functions are selectable through the port mapping controller.
(2) Only on devices with ADC
TB0.0
TB0.1
TB0.2
TB0.3
TB0.4
TB0.5
TB0.6
OUTPUT PIN NUMBER
RGC, YFF,
ZQE ⁽¹⁾
PN
ADC12
(internal) ⁽²⁾
ADC12SHSx =
{2}
55-P5.6
ADC12
(internal) ⁽²⁾
ADC12SHSx =
{2}
ADC12 (internal)
ADC12SHSx =
{3}
56-P5.7
ADC12 (internal)
ADC12SHSx =
{3}
57-P7.4
58-P7.5
59-P7.6
42-P3.5
43-P3.6
34
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