AM5718_17 Datasheet, PDF (82/396 Pages) Texas Instruments – Sitara Processors Silicon Revision 2.0

AM5718, AM5716
SPRS957D – MARCH 2016 – REVISED JANUARY 2017
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NOTE
In some cases Table 4-3 may present more than one signal per muxmode for the same ball. First signal in the list is the dominant function
as selected via CTRL_CORE_PAD_* register.
All other signals are virtual functions that present alternate multiplexing options. This virtual functions are controlled via
CTRL_CORE_ALT_SELECT_MUX or CTRL_CORE_VIP_MUX_SELECT register. For more information on how to use this options,
please refer to Device TRM, Chapter Control Module, Section Pad Configuration Registers.
NOTE
Dual rank support is not available on this device, but signal names are retained for consistency with the AM57xx family of devices.
CAUTION
The I/O timings provided in Section 7, Timing Requirements and Switching Characteristics are valid only if signals within
a single IOSET are used. The IOSETs are defined in the corresponding tables.
Table 4-3. Multiplexing Characteristics
ADDRESS REGISTER NAME
BALL
NUMBER
0
1
2
MUXMODE FIELD SETTINGS (CTRL_CORE_PAD_*[3:0])
3*
4*
5*
6*
7
8*
9
10
11
12
13
14*
15
Y23
ddr1_d26
Y19
ddr1_d21
AE15
xi_osc0
AH24
ddr1_nck
AG15
ljcb_clkp
AF24
ddr1_d4
V25
ddr1_ecc_d
6
AB16
ddr1_csn1
AG19
hdmi1_data
2x
AF21
ddr1_a4
AG5
csi2_1_dx0
W23
ddr1_ecc_d
3
Y27
ddr1_dqsn3
AC24
ddr1_d14
AF28
ddr1_d11
82
Terminal Configuration and Functions
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