DAC38RF80_17 Datasheet, PDF (80/155 Pages) Texas Instruments – Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL

DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3A – DECEMBER 2016 – REVISED FEBRUARY 2017
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8.5.5 SERDES Loss of Signal Detection Alarms Register (address = 0x04) [reset = 0x0000]
Figure 80. SERDES Loss of Signal Detection Alarms Register (ALM_SD_DET)
15
0
W0C
14
0
W0C
13
0
W0C
12
0
W0C
11
0
W0C
10
0
W0C
9
0
W0C
8
x
W0C
7
6
5
4
3
2
0
0
0
0
0
1
W0C
W0C
W0C
W0C
W0C
W0C
LEGEND: R/W = Read/Write; R = Read only; W0C = Write 0 to clear bit; -n = value after reset
1
0
W0C
0
0
W0C
Table 46. ALM_SD_DET Field Descriptions
Bit Field
15:8 Reserved
7:0 ALM_SD_LOSDET
Type
W0C
Reset
0x00
W0C
0x00
Description
Reserved
Loss of signal detect outputs from the SERDES lanes:
bit 7 = lane7 loss of signal
bit 6 = lane6 loss of signal
bit 5 = lane5 loss of signal
bit 4 = lane4 loss of signal
bit 3 = lane3 loss of signal
bit 2 = lane2 loss of signal
bit 1 = lane1 loss of signal
bit 0 = lane0 loss of signal
80
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