THS6226A Datasheet, PDF (8/32 Pages) Texas Instruments – THS6226A Gated-Class H, Dual-Port VDSL2 Line Driver

THS6226A
SBOS643A – APRIL 2014 – REVISED MAY 2014
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Electrical Characteristics: V_S = +12 V (continued)
At T_A = 25°C, R_MATCH = 10.2 Ω, transformer turn ratio 1:1.4, R_L = 100-Ω differential at transformer output, full bias mode, and
active impedance circuit configuration, unless otherwise noted. Each port is tested independently.
PARAMETER
CONDITIONS
TEST
MIN
TYP
MAX UNIT
LEVEL ⁽¹⁾
LOGIC
Logic 1, with respect to GND⁽⁵⁾
1.9
Logic threshold
Logic 0, with respect to GND⁽⁵⁾
V
C
0.8
V
C
Logic pin
Input Bias current
Input impedance
Logic X = 0.5 V (logic 0), T_A = 25°C
T_A = –40°C to 85°C
Logic X = 3.3 V (logic 1), T_A = 25°C
T_A = –40°C to 85°C
10
66
50 || 1
25
μA
A
30
μA
B
125
μA
A
130
μA
B
kΩ || pF
C
t_d(on)
t_d(off)
Turn-on time delay
Turn-off time delay
Time for I_S to reach 50% of final value
Time for I_S to reach 50% of final value
1
μs
C
1
μs
C
(5) The GND pin usable range is from V_S– to (V_S+ – 5 V).
6.6 Timing Characteristics
PARAMETER
t_CL
Clock period
MIN
MAX UNITS
200
ns
1 2 3 4 5 6 7 8 9 10 11 12
CLK
t_CL
DATA
t_SETUP
Figure 1. Serial Interface Timing
8
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