THS1060_05 Datasheet, PDF (8/22 Pages) Texas Instruments – 10-BIT 60 MSPS IF SAMPLING COMMUNICATIONS

THS1060
10-BIT 60 MSPS IF SAMPLING COMMUNICATIONS
ANALOG-TO-DIGITAL CONVERTER
SLAS212A – MARCH 2000 – REVISED MARCH 2001
Sample N
AIN
tp(H)
td(A)
tP(L)
td(Pipe)
CLK+
Digital Output
(D0 – D9)
tc
Data N–7
Data N–6
Data N–5
Data N–4
Data N–3
td(O)
Data N–2 Data N–1
Data N
Data N+1 Data N+2
Figure 1. Timing Diagram
equivalent circuits
R2
BAND
R1
GAP
R1
R2
VREFOUT+
VREFOUT_–
AVDD
R1
VCM
R2
AVSS
Figure 2. References
VIN+
900 Ω
VIN–
φ2
VCM
φ1′
φ1
φ1
φ1′
VCM
φ2
Figure 3. Analog Input Stage
CLK+
DVDD
VDD
DVSS
DVDD
Timing
10 Ω
D0–D11
CLK–
DVSS
Figure 4. Clock Inputs
VSS
Figure 5. Digital Outputs
8
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