TCAN330_16 Datasheet, PDF (8/40 Pages) Texas Instruments – 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate)

TCAN330, TCAN332, TCAN334, TCAN337
TCAN330G, TCAN332G, TCAN334G, TCAN337G
SLLSEQ7D – DECEMBER 2015 – REVISED APRIL 2016
www.ti.com
8.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
DEVICE SWITCHING CHARACTERISTICS
t_PROP(LOOP)
Total loop delay, driver input (TXD) to
receiver output (RXD), recessive to
dominant and dominant to recessive
See Figure 23, S, STB and SHDN = 0 V,
R_L = 60 Ω, C_L = 100 pF, C_L(RXD) = 15 pF
100
135
ns
t_PROP(LOOP)
Total Loop delay in highly loaded
network
See Figure 23, S, STB and SHDN = 0 V,
R_L = 120 Ω, C_L = 200 pF,
C_L(RXD) = 15 pF
120
180
ns
t_{BUS_SYM_2}
2 Mbps transmitted recessive bit width See Figure 24, S or STB = 0 V, R_L = 60
435
t_{REC_SYM_2}
2 Mbps received recessive bit width
Ω, C_L = 100 pF, C_L(RXD) = 15 pF,
t_BIT = 500 ns
400
Δt_{SYM_2}
2 Mbps receiver timing symmetry
(t_{REC_SYM_2} - t_{BUS_SYM_2})
TCAN330G, TCAN332G, TCAN334G
and TCAN337G only
–65
530
ns
550
ns
40
ns
t_{BUS_SYM_5}
5 Mbps transmitted recessive bit width See Figure 24, S or STB = 0 V, R_L = 60
155
t_{REC_SYM_5}
5 Mbps received recessive bit width
Ω, C_L = 100 pF, C_L(RXD) = 15 pF,
t_BIT = 200 ns
120
Δt_{SYM_5}
5 Mbps receiver timing symmetry
(t_{REC_SYM_5} - t_{BUS_SYM_5})
TCAN330G, TCAN332G, TCAN334G
and TCAN337G only
–45
210
ns
220
ns
15
ns
t_MODE
Mode change time
See Figure 21 and Figure 22.
R_L = 60 Ω, C_L = 100 pF,
C_L(RXD) = 15 pF
5
10
µs
t_{UV_RE-ENABLE}
Re-enable time after UV event
Time for device to return to normal
operation from UV_(VCC) under voltage
event
1000
µs
t_{WK_FILTER}
Bus time to meet Filtered Bus
Requirements for Wake Up Request
See Figure 33, Standby mode.
–12 V < V_CM < 12 V
0.5
DRIVER SWITCHING CHARACTERISTICS
4
µs
t_pHR
Propagation delay time, HIGH TXD to
Driver Recessive
25
t_pLD
Propagation delay time, LOW TXD to
Driver Dominant
See Figure 19, S, STB and SHDN = 0 V.
t_sk(p)
Pulse skew (|t_pHR - t_pLD|)
R_L = 60 Ω, C_L = 100 pF,
20
ns
5
t_r
Differential output signal rise time
17
t_f
Differential output signal fall time
9
t_{TXD_DTO}
Driver dominant time out ⁽¹⁾
See Figure 25,
R_L = 60 Ω, C_L = 100 pF
1.2
2.6
3.8
ms
RECEIVER SWITCHING CHARACTERISTICS
t_pRH
Propagation delay time, bus recessive
input to high RXD output
62
t_pDL
t_r
t_f
t_{RXD_DTO}
Propagation delay time, bus dominant
input to RXD low output
Output signal rise time (RXD)
Output signal fall time (RXD)
Receiver dominant time out ⁽²⁾
See Figure 20, C_L(RXD) = 15 pF CANL =
1.5 V, CANH = 3.5 V
See Figure 27, C_L(RXD) = 15 pF
56
7
6
1.6
3
ns
5
ms
(1) The TXD dominant time out (t_{TXD_DTO}) disables the driver of the transceiver once the TXD has been dominant longer than t_{TXD_DT}O,
which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit
dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults, locking the bus dominant, it
limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst
case, where five successive dominant bits are followed immediately by an error frame. This, along with the t_{TXD_DTO} minimum, limits the
minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ t_{TXD_DTO} = 11 bits / 1.2 ms = 9.2 kbps.
(2) The RXD timeout (t_{RXD_DTO}) disables the RXD output in the case that the bus has been dominant longer than t_{RXD_DTO}, which releases
RXD pin to the recessive state (high), thus preventing a dominant bus failure from permanently keeping the RXD pin low. The RXD pin
will automatically resume normal operation once the bus has been returned to a recessive state. While this protects the protocol
controller from a permanent dominant state, it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven
successive dominant bits (on RXD) for the worst case, where five successive dominant bits are followed immediately by an error frame.
This, along with the t_{RXD_DTO} minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11 /
t_{RXD_DTO} = 11 bits / 1.6 ms = 6.9 kbps.
8
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