TCAN330_16 Datasheet, PDF (30/40 Pages) Texas Instruments – 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate)

TCAN330, TCAN332, TCAN334, TCAN337
TCAN330G, TCAN332G, TCAN334G, TCAN337G
SLLSEQ7D – DECEMBER 2015 – REVISED APRIL 2016
13 Layout
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13.1 Layout Guidelines
TCAN33x family of devices incorporates integrated IEC 61000-4-2 ESD protection. Should the system requires
additional protection against ESD, EFT or surge, additional external protection and filtering circuitry may be
needed.
In order for the PCB design to be successful, start with design of the protection and filtering circuitry. Because
ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency
layout techniques must be applied during PCB design.
Design the bus protection components in the direction of the signal path. Do not force the transient current to
divert from the signal path to reach the protection device. Below is a list of layout recommendations when
designing a CAN transceiver into an application.
• Transient Protection on CANH and CANL: Transient Voltage Suppression (TVS) and capacitors (D1, C5 and
C7 shown in Figure 40) can be used for additional system level protection. These devices must be placed as
close to the connector as possible. This prevents the transient energy and noise from penetrating into other
nets on the board.
• Bus Termination on CANH and CANL: Figure 40 shows split termination where the termination is split into two
resistors, R5 and R6, with the center or split tap of the termination connected to ground through capacitor C6.
Split termination provides common mode filtering for the bus. When termination is placed on the board
instead of directly on the bus, care must be taken to ensure the terminating node is not removed from the
bus, as this causes signal integrity issues if the bus is not properly terminated on both ends.
• Decoupling Capacitors on V_CC: Bypass and bulk capacitors must be placed as close as possible to the supply
pins of transceiver (examples are C2 and C3).
• Ground and power connections: Use at least two vias for V_CC and ground connections of bypass capacitors
and protection devices to minimize trace and via inductance.
• Digital inputs and outputs: To limit current of digital lines, serial resistors may be used. Examples are R1, R2,
R3 and R4.
• Filtering noise on digital inputs and outputs: To filter noise on the digital I/O lines, a capacitor may be used
close to the input side of the I/O as shown by C1, C8 and C4.
• Fault Output Pin (TCAN337 only): Because the FAULT output pin is an open drain output, an external pullup
resistor is required to pull the pin voltage high for normal operation (R7).
• TXD input pin: If an open-drain host processor is used to drive the TXD pin of the device, an external pullup
resistor between 1 kΩ and 10 kΩ must be used to help drive the recessive input state of the device (weak
internal pullup resistor).
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