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DAC8811ICDGKT Datasheet, PDF (8/21 Pages) Texas Instruments – 16-Bit, Serial Input Multiplying Digital-to-Analog Converter
DAC8811
SLAS411B – NOVEMBER 2004 – REVISED FEBRUARY 2007
THEORY OF OPERATION
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The DAC8811 is a single channel current output, 16-bit digital-to-analog converter (DAC). The architecture,
illustrated in Figure 17, is an R-2R ladder configuration with the three MSBs segmented. Each 2R leg of the
ladder is either switched to GND or the IOUT terminal. The IOUT terminal of the DAC is held at a virtual GND
potential by the use of an external I/V converter op amp. The R-2R ladder is connected to an external reference
input VREF that determines the DAC full-scale current. The R-2R ladder presents a code independent load
impedance to the external reference of 5 kΩ ±25%. The external reference voltage can vary in a range of -15 V
to 15 V, thus providing bipolar IOUT current operation. By using an external I/V converter and the DAC8811 RFB
resistor, output voltage ranges of -VREF to VREF can be generated.
VREF
R
R
R
2R 2R 2R 2R 2R 2R 2R
2R
2R
2R
2R
2R
RFB
IOUT
GND
Figure 17. Equivalent R-2R DAC Circuit
When using an external I/V converter and the DAC8811 RFB resistor, the DAC output voltage is given by
Equation 1:
VOUT + *VREF
CODE
65536
(1)
Each DAC code determines the 2R leg switch position to either GND or IOUT. Because the DAC output
impedance as seen looking into the IOUT terminal changes versus code, the external I/V converter noise gain will
also change. Because of this, the external I/V converter op amp must have a sufficiently low offset voltage such
that the amplifier offset is not modulated by the DAC IOUT terminal impedance change. External op amps with
large offset voltages can produce INL errors in the transfer function of the DAC8811 due to offset modulation
versus DAC code. For best linearity performance of the DAC8811, an op amp (OPA277) is recommended
(Figure 18). This circuit allows VREF swinging from -10 V to +10 V.
VDD
U1
VDD
RFB
VREF
DAC8811
IOUT
GND
U2 15 V
_ V+
OPA277
VO
+
V−
−15 V
Figure 18. Voltage Output Configuration
8
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