TM4C1231E6PM Datasheet, PDF (765/1133 Pages) Texas Instruments – Brown-Out Reset Control (PBORCTL), offset 0x030

Tiva^™ TM4C1231E6PM Microcontroller _{(identical to LM4F110E5QR)}
bits in the ADC Processor Sample Sequence Initiate (ADCPSSI) register. Software could then
combine the results from the two modules to create a sample rate of two million samples/second
at 16 MHz as shown in Figure 13-4 on page 765.
Figure 13-4. Doubling the ADC Sample Rate
ADC Sample Clock
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
GSYNC
ADC 0 PHASE 0x0 (0.0°)
ADC 1 PHASE 0x8 (180.0°)
Using the ADCSPC register, ADC0 and ADC1 may provide a number of interesting applications:
■ Coincident sampling of different signals. The sample sequence steps run coincidently in both
converters.
– ADC Module 0, ADCSPC = 0x0, sampling AIN0
– ADC Module 1, ADCSPC = 0x0, sampling AIN1
■ Skewed sampling of the same signal. The sample sequence steps are 1/2 of an ADC clock (500
µs for a 1Ms/s ADC) out of phase with each other. This configuration doubles the conversion
bandwidth of a single input when software combines the results as shown in Figure
13-5 on page 765.
– ADC Module 0, ADCSPC = 0x0, sampling AIN0
– ADC Module 1, ADCSPC = 0x8, sampling AIN0
Figure 13-5. Skewed Sampling
ADC0 S1 S2 S3 S4 S5 S6 S7 S8
ADC1
S1 S2 S3 S4 S5 S6 S7 S8
July 16, 2013
765
Texas Instruments-Production Data