ADS5296A Datasheet, PDF (75/107 Pages) Texas Instruments – 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter

ADS5296A
www.ti.com
SBAS631 – OCTOBER 2013
D15
D14
D13
EN_LVDS_
PROG
0
0
D7
D6
D5
DELAY_LCLK_R[2:0]
All bits default to '0' after reset.
Table 53. Register BEh
D12
D11
0
0
D4
D3
DELAY_DATA_F[1:0]
D10
D9
D8
0
DELAY_DATA_R[1:0]
D2
D1
D0
DELAY_LCLK_F[2:0]
Bit D15
Bits D[14:10]
Bits D[9:8]
Bits D[7:5]
Bits D[4:3]
Bits D[2:0]
This bit enables LVDS edge delay programmability.
Must write '0'
Refer to Table 68 for settings.
Refer to Table 69 for settings.
Refer to Table 68 for settings.
Refer to Table 69 for settings.
Table 54. Register F0h
D15
D14
D13
D12
D11
D10
D9
D8
EN_EXT_REF
0
0
0
0
0
0
0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
All bits default to '0' after reset.
The EN_HIGH_ADDRS register bit (register 01h, bit D4) must be set to '1' to allow access to this register.
Bit D15
Bits D[14:0]
EN_EXT_REF
0 = Internal reference mode (default)
1 = External reference mode enabled; apply the reference voltages on the REFT and REFB
pins
Must write '0'
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