ADS5296A Datasheet, PDF (49/107 Pages) Texas Instruments – 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter

ADS5296A
www.ti.com
SBAS631 – OCTOBER 2013
D15
D14
D13
0
0
0
D7
D6
D5
0
0
0
All bits default to '0' after reset.
Table 11. Register 07h
D12
D11
0
0
D4
D3
0
0
D10
D9
D8
0
0
0
D2
D1
D0
0
EN_MUX_REG
EN_
INTERLEAVE
Bits D[15:2]
Bit D1
Bit D0
Must write '0'
EN_MUX_REG
Enables mux mode interleaving using register bit.
0 = Enables mux mode interleaving using the ODD_EVEN_SEL register bits (default)
1 = Enables mux mode interleaving using the INTERLEAVE_MUX pin.
For more details on this bit, see the Interleaving Mode section.
EN_INTERLEAVE
Enables interleaving of adjacent channel pairs.
0 = Interleaving disabled (default)
1 = Interleaving enabled
For more details on this bit, see the Interleaving Mode section.
Table 12. Register 0Ah
D15
D14
D13
D12
D11
D10
D9
D8
RAMP_PAT_RESET_VAL
D7
D6
D5
D4
D3
D2
D1
D0
RAMP_PAT_RESET_VAL
All bits default to '0' after reset.
Bits D[15:0]
RAMP_PAT_RESET_VAL
The starting value of the digital ramp test pattern can be programmed using these register
bits. By default, the starting value is 0000h after reset.
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: ADS5296A
Submit Documentation Feedback
49