TMS570LS2125 Datasheet, PDF (71/154 Pages) Texas Instruments – TMS570LSxxx5 16/32-Bit RISC Flash Microcontroller

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TMS570LS2125
TMS570LS2135
TMS570LS3135
SPNS164 – SEPTEMBER 2011
MODULE NAME
MIBADC1
MIBADC2
FlexRay
I2C
DCAN1
DCAN2
DCAN3
LIN
SCI
MibSPI1
SPI2
MibSPI3
SPI4
MibSPI5
DMA RAM
VIM RAM
RTP RAM
Flash Module
eFuse Controller
Power
Management
Module (PMM)
Test Controller
(FMTM)
PCR registers
System Module -
Frame 2 (see
device TRM)
PBIST
STC
IOMM
Multiplexing
Control Module
FRAME CHIP
SELECT
PS[15]
PS[15]
PS[12]+PS[13]
PS[10]
PS[8]
PS[8]
PS[7]
PS[6]
PS[6]
PS[2]
PS[2]
PS[1]
PS[1]
PS[0]
PPCS0
PPCS2
PPCS3
PPCS7
PPCS12
PPSE0
PPSE1
PPS0
PPS0
PPS1
PPS1
PPS2
Table 4-21. Device Memory Map (continued)
FRAME ADDRESS RANGE
START
END
FRAME ACTUA
SIZE L SIZE
0xFFF7_C000 0xFFF7_C1FF 512B 512B
0xFFF7_C200 0xFFF7_C3FF 512B 512B
0xFFF7_C800 0xFFF7_CFFF 2KB
2KB
0xFFF7_D400 0xFFF7_D4FF 256B 256B
0xFFF7_DC00 0xFFF7_DDFF 512B 512B
0xFFF7_DE00 0xFFF7_DFFF 512B 512B
0xFFF7_E000 0xFFF7_E1FF 512B 512B
0xFFF7_E400 0xFFF7_E4FF 256B 256B
0xFFF7_E500 0xFFF7_E5FF 256B 256B
0xFFF7_F400 0xFFF7_F5FF 512B 512B
0xFFF7_F600 0xFFF7_F7FF 512B 512B
0xFFF7_F800 0xFFF7_F9FF 512B 512B
0xFFF7_FA00 0xFFF7_FBFF 512B 512B
0xFFF7_FC00 0xFFF7_FDFF 512B 512B
System Modules Control Registers and Memories
0xFFF8_0000
0xFFF8_0FFF
4KB
4KB
0xFFF8_2000
0xFFF8_2FFF
4KB
1KB
0xFFF8_3000
0xFFF8_3FFF
4KB
4KB
0xFFF8_7000
0xFFF8_7FFF
4KB
4KB
0xFFF8_C000 0xFFF8_CFFF 4KB
4KB
RESPNSE FOR ACCESS TO
UNIMPLEMENTED LOCATIONS IN
FRAME
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Abort
Wrap around for accesses to
unimplemented address offsets lower
than 0x3FF. Abort generated for
accesses beyond 0x3FF.
Abort
Abort
Abort
0xFFFF_0000 0xFFFF_01FF 512B 512B
Abort
0xFFFF_0400
0xFFFF_E000
0xFFFF_E100
0xFFFF_E400
0xFFFF_E600
0xFFFF_EA00
0xFFFF_07FF
0xFFFF_E0FF
0xFFFF_E1FF
0xFFFF_E5FF
0xFFFF_E6FF
0xFFFF_EBFF
1KB
1KB
256B 256B
256B 256B
512B 512B
256B 256B
512B 512B
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Generates address error interrupt, if
enabled
Reads return zeros, writes have no
effect
Copyright © 2011, Texas Instruments Incorporated
System Information and Electrical Specifications
71
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