 English |
|
|
|
|
|
|
|
| TMS570LS2125 Datasheet, PDF (137/154 Pages) Texas Instruments – TMS570LSxxx5 16/32-Bit RISC Flash Microcontroller | |||
| |||
| ◁ |
www.ti.com
TMS570LS2125
TMS570LS2135
TMS570LS3135
SPNS164 â SEPTEMBER 2011
NOTE
⢠A device must internally provide a hold time of at least 300 ns for the SDA signal
(referred to the VIHmin of the SCL signal) to bridge the undefined region of the falling
edge of SCL.
⢠The maximum th(SDA-SCLL) has only to be met if the device does not stretch the LOW
period (tw(SCLL)) of the SCL signal.
⢠A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the
requirement tsu(SDA-SCLH) ⥠250 ns must then be met. This will automatically be the case if
the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line
tr max + tsu(SDA-SCLH).
⢠Cb = total capacitance of one bus line in pF. If mixed with fast-mode devices, faster
fall-times are allowed.
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 137
Submit Documentation Feedback
focus.ti.com: TMS570LS2125 TMS570LS2135 TMS570LS3135
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese