THS12082_09 Datasheet, PDF (7/42 Pages) Texas Instruments – 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS

THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271B – MAY 2000 – REVISED DECEMBER 2002
timing specifications (AV_DD = BV_DD = DV_DD = 5 V, V_REFP = 3.5 V, V_REFM = 1.5 V, C_L < 30 pF )^†
PARAMETER
TEST CONDITIONS
MIN TYP MAX
td(DATA_AV) Delay time
5
td(o)
Delay time
5
td(pipe)
Latency
5
† _{Refer to Figure 2}
UNIT
ns
ns
CONV
CLK
timing specification of the single conversion mode^‡
PARAMETER
tc
Clock cycle of the internal clock oscillator
t1
Pulse duration, CONVST
tdA
Aperture time
t2
Time between consecutive start of single
conversion
td(DATA_AV)
Delay time, DATA_AV becomes active for the
trigger level condition: TRIG0 = 1, TRIG1 = 1
‡ _{Refer to Figure 1}
TEST CONDITIONS
1 analog input
2 analog inputs
1 analog input
2 analog inputs
1 analog input, TL = 1
2 analog inputs, TL = 2
1 analog input, TL = 4
2 analog inputs, TL = 4
1 analog input, TL = 8
2 analog inputs, TL = 8
1 analog input, TL = 14
2 analog inputs, TL = 12
MIN
117
1.5×tc
2.5×tc
2×tc
3×tc
TYP
MAX
125
133
1
6.5×tc+15
7.5×tc+15
3×t2 +6.5×tc+15
t2 +7.5×tc+15
7×t2 +6.5×tc+15
3×t2 +7.5×tc+15
13×t2 +6.5×tc+15
5×t2 +7.5×tc+15
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
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