LMX2430_16 Datasheet, PDF (7/53 Pages) Texas Instruments – Dual High-Frequency Synthesizer

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LMX2430, LMX2433, LMX2434
SNAS187D – FEBRUARY 2003 – REVISED JANUARY 2016
Electrical Characteristics (continued)
V_CC = EN = 2.5 V, −40°C ≤ T_A ≤ +85°C, unless otherwise specified
PARAMETER
TEST CONDITIONS
PHASE NOISE CHARACTERISTICS
L_NRF(f)
RF synthesizer normalized phase noise
contribution ⁽⁶⁾
TCXO Reference Source
RF_CPG Bit = 1
IF_PD Bit = 1
L_NIF(f)
IF synthesizer normalized phase noise
contribution ⁽⁶⁾
TCXO Reference Source
IF_CPG Bit = 1
RF_PD Bit = 1
L_RF(f)
LMX2430
RF synthesizer single-
side band phase noise LMX2433
measured
LMX2434
f_FinRF = 2750 MHz
f = 10-kHz offset
f_COMPRF = 1 MHz
Loop Bandwidth = 100 kHz
N_RF = 2750
f_OSCin = 10 MHz
v_OSCin = 1 V_PP
RF_CPG Bit = 1
IF_PD Bit = 1
T_A = 25^oC ⁽⁷⁾
f_FinRF = 3200 MHz
f = 10-kHz offset
f_COMPRF = 1 MHz
Loop Bandwidth = 100 kHz
N_RF = 3200
f_OSCin = 10 MHz
v_OSCin = 1 V_PP
RF_CPG Bit = 1
IF_PD Bit = 1
T_A = 25°C⁽⁷⁾
f_FinRF = 4700 MHz
f = 10-kHz offset
f_COMPRF = 1 MHz
Loop Bandwidth = 100 kHz
N_RF = 4700
f_OSCin = 10 MHz
v_OSCin = 1 V_PP
RF_CPG Bit = 1
IF_PD Bit = 1
T_A = 25°C⁽⁷⁾
MIN
TYP
MAX UNIT
–219
–214
dBc/
Hz
dBc/
Hz
–90.3
dBc/
Hz
–88.9
dBc/
Hz
–85.6
dBc/
Hz
(6) Normalized Phase Noise Contribution is defined as L_N(f) = L(f) − 20 log (N) − 10 log (f_COMP), where L(f) is defined as the single side
band phase noise measured at an offset frequency, f, in a 1-Hz bandwidth. The offset frequency, f, must be chosen sufficiently smaller
than the loop bandwidth of the PLL, yet large enough to avoid substantial phase noise contribution from the reference source. N is the
value selected for the feedback divider and f_COMP is the RF/IF phase and frequency detector comparison frequency.
(7) The synthesizer phase noise is measured with the LMX2430PW/LMX2430NPE evaluation boards and the HP8566B Spectrum Analyzer.
7.5 Timing Requirements
See ⁽¹⁾
MICROWIRE INTERFACE
t_CS
t_CH
t_CWH
t_CWL
t_ES
t_EW
DATA to CLK set-up time
DATA to CLK hold time
CLK pulse width HIGH
CLK pulse width LOW
CLK to LE set-up time
LE pulse width
(1) Refer to LMX243x Serial Data Input Timing figure.
MIN
NOM
MAX UNIT
50
ns
10
ns
50
ns
50
ns
50
ns
50
ns
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