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LMX2430_16 Datasheet, PDF (15/53 Pages) Texas Instruments – Dual High-Frequency Synthesizer
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LMX2430, LMX2433, LMX2434
SNAS187D – FEBRUARY 2003 – REVISED JANUARY 2016
Bench Test Setups (continued)
pin by selecting the RF_N/2 Frequency word (MUX[3:0] word = 15) in CodeLoader. A Universal Counter is
connected to the Ftest/LD pin and used to monitor the output frequency of the feedback divider. The expected
frequency must be the signal generator frequency divided by twice the corresponding counter value, that is,
20,000. The factor of two comes in because the LMX43x device has an internal /2 circuit which is used to
provide a 50% duty cycle.
Sensitivity is typically measured over frequency, supply voltage and temperature. In order to perform the
measurement, the temperature, frequency, and supply voltage is set to a fixed value, and the power level of the
signal at FinRF is varied. Sensitivity is reached when the frequency error of the divided RF input is greater than
or equal to 1 Hz. The power attenuation from the cable and the 3-dB pad must be accounted for. The feedback
divider miscounts if too much or too little power is applied to the FinRF input. Therefore, the allowed input power
level is bounded by the upper and lower sensitivity limits. In a typical application, if the power level to the FinRF
input approaches the sensitivity limits, this can introduce spurs or cause degradation to the phase noise. When
the power level gets even closer to these limits, or exceeds them, the RF PLL loses lock.
8.1.4 LMX243x OSCin Sensitivity Test Setup
Figure 26. OSCin Sensitivity Test Setup
Figure 26 shows the setup required to measure the OSCin buffer sensitivity level in the LMX243x device. The
same setup is used for the LMX2430PW evaluation board. This setup is similar to the FinRF sensitivity setup
except that the signal generator is now connected to the OSCin pin, and both Fin pins are tied to VCC. The 51-Ω
shunt resistor matches the OSCin input to the signal generator. The R counter is typically set to 1000, that is,
RF_R word = 1000 or IF_R word = 1000. The reference divider output is routed to the Ftest/LD pin by selecting
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