LM3880_14 Datasheet, PDF (7/20 Pages) Texas Instruments – Power Sequencer

LM3880, LM3880Q
www.ti.com
TEST CIRCUIT DIAGRAMS
SNVS451H – AUGUST 2006 – REVISED JULY 2011
Timing Diagrams (Sequence 1)
All standard options use this sequence for output flags rise and fall order.
EN
FLAG1
FLAG2
FLAG3
t_d1
t_d2
t_d3
Figure 3. Power Up Sequence
EN
FLAG1
FLAG2
FLAG3
t_d4
t_d5
t_d6
Figure 4. Power Down Sequence
Application Information
OVERVIEW
The LM3880 Power Sequencer provides an easy solution for sequencing multiple rails in a controlled manner.
Six independent timers are integrated to control the timing sequence (power up and power down) of three open
drain output flags. These flags permit connection to either a shutdown / enable pin of linear regulators and
switchers to control the power supplies’ operation. This allows a complete power system to be designed without
worrying about large in-rush currents or latch-up conditions that can occur.
Copyright © 2006–2011, Texas Instruments Incorporated
Product Folder Links: LM3880 LM3880Q
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