DS90CP02_15 Datasheet, PDF (7/16 Pages) Texas Instruments – 1.5 Gbps 2x2 LVDS Crosspoint Switch

DS90CP02
www.ti.com
SNLS267A – NOVEMBER 2008 – REVISED MARCH 2013
Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
Typ
(1)
Max
Units
t_SKCC
Output Channel to Channel Skew
Difference in propagation delay (t_PLHD or
t_PHLD) among all output channels in
Splitter mode (any one input to all
0
outputs).
t_JIT
Jitter
(4)
RJ - Clock Pattern
750 MHz ⁽⁵⁾
DJ - K28.5 Pattern
1.5 Gbps ⁽⁶⁾
TJ - PRBS 2²³-1 Pattern
1.5 Gbps ⁽⁷⁾
t_ON
LVDS Output Enable Time
Time from ENx to OUT± change from
TRI-STATE to active.
50
t_OFF
LVDS Output Disable Time
Time from ENx to OUT± change from
active to TRI-STATE.
t_SW
LVDS Switching Time
SELx to OUT±
Time from configuration select (SELx) to
new switch configuration effective for
OUT±.
130
315
ps
1.4
2.5
psrms
42
75
psp-p
93
126
psp-p
110
150
ns
5
12
ns
110
150
ns
(4) Jitter is not production tested, but guaranteed through characterization on a sample basis.
(5) Random Jitter, or RJ, is measured RMS with a histogram including 1500 histogram window hits. The input voltage = V_ID = 500mV, 50%
duty cycle at 750MHz, t_r = t_f = 50ps (20% to 80%).
(6) Deterministic Jitter, or DJ, is measured to a histogram mean with a sample size of 350 hits. The input voltage = V_ID = 500mV, K28.5
pattern at 1.5 Gbps, t_r = t_f = 50ps (20% to 80%). The K28.5 pattern is repeating bit streams of (0011111010 1100000101).
(7) Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture jitter has been
subtracted. The input voltage = V_ID = 500mV, 2²³-1 PRBS pattern at 1.5 Gbps, t_r = t_f = 50ps (20% to 80%).
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