BQ2961_17 Datasheet, PDF (7/33 Pages) Texas Instruments – Overvoltage Protection for 2-Series, 3-Series, and 4-Series Cell Li-Ion Batteries with Regulated Output Supply

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bq2961, bq2962
SLUSBU5D – NOVEMBER 2013 – REVISED JANUARY 2017
7.5 Electrical Characteristics
Typical values stated where T_A = 25°C and VDD = 14.4 V, MIN/MAX values stated where T_A = –40°C to +110°C, and V_DD =
3 V to 15 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN TYP MAX
Voltage Protection Thresholds
V_(PROTECT)
V_OV
Overvoltage
Detection
R_IN = 1 kΩ
Applicable Voltage: 3.85 V
to 4.6 V in 50 mV steps
V_HYS
OV Detection
Hysteresis
250
300
400
V_OA
OV Detection
Accuracy
T_A = 25°C
–10
10
V_OADRIFT
OV Detection
Accuracy Across
Temperature
Supply and Leakage Current
T_A = –40°C
T_A = 0°C
T_A = 60°C
T_A = 110°C
T_A = 110°C
–40
40
–20
20
–24
24
–54
54
–54
54
I_DD
Supply Current with
REG on
(V_n – V_n-1) = 2 V to 4.15 V, n = 1 to 4,
VDD = top V_n voltage
(V1 – V_SS) > V_UVREG , I_REG = 0 mA,
T_A = 0°C to 60°C
T_A = –40°C to 110°C
4
6
8
I_DD
Supply Current with
REG off
(V_n – V_n-1) = 2 V to 4.15 V, n = 1 to 4,
VDD = top V_n voltage
(V1 – V_SS) < V_UVREG
T_A = 0°C to 60°C
T_A = –40°C to 110°C
1
2
4
I_IN
Input Current at V_x (V_n – V_n-1) = (V1 – V_SS) = 3.8 V, VDD = top V_n voltage, T_A =
Pins
25°C
–0.1
0.1
Output Drive OUT, CMOS Active High
(V_n – V_n-1) or (V1 – V_SS) > V_OV, I_OH = 100 µA, VDD = top V_n
voltage
6
7
8
V_OUT
Output Drive
Voltage, Active High
If three of four cells are short circuited, only one cell remains
powered and > V_OV, VDD = V_n (the remaining cell voltage), I_OH
= 100 µA
VDD –
0.3
I_OUTH
OUT Source Current
(during OV)
(V_n – V_n-1) and (V1 – V_SS) < V_OV, VDD = sum of the cell stack
voltage, I_OL = 100 µA measured into OUT pin
(V_n – V_n-1), (V3 – V2), or (V1 – V_SS) > V_OV, VDD = top V_n
voltage,
forced OUT = 0 V, measured out of OUT pin
250
400
4.5
I_OUTL
OUT Sink Current
(no OV)
(V_n – V_n-1) and (V1 – V_SS) < V_OV, VDD = top V_n voltage, forced
OUT = VDD, measured into OUT pin. Pull-up resistor R_PU = 5
kΩ to VDD
0.5
14
Internal Fixed Delay Timer
Internal Fixed Delay, 3 second delay option
2.4
3
3.6
t_DELAY
OV Delay Time⁽¹⁾
Internal Fixed Delay, 4 second delay option
Internal Fixed Delay, 5.5 second delay option
3.2
4
4.8
4.4
5.5
6.6
Internal Fixed Delay, 6.5 second delay option
5.2
6.5
7.8
Fault Detection
t_{DELAY_CTM}
Delay Time in Test
Mode OV Delay
Internal Fixed delay
15
Time
UNIT
V
mV
mV
mV
mV
mV
mV
mV
µA
µA
µA
µA
µA
V
V
mV
mA
mA
s
s
s
s
ms
(1) Specified by design. Not 100% tested in production.
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