ADS54J42 Datasheet, PDF (7/81 Pages) Texas Instruments – Dual-Channel, 14-Bit, 625-MSPS, Analog-to-Digital Converter

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ADS54J42
SBAS756A – FEBRUARY 2016 – REVISED MARCH 2016
7.5 Electrical Characteristics
typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling rate = 625 MSPS,
50% clock duty cycle, AVDD3V = 3.0 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, and –1-dBFS differential input (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
GENERAL
ADC sampling rate
625 MSPS
Resolution
14
Bits
POWER SUPPLIES
AVDD3V
3.0-V analog supply
2.85
3.0
3.6 V
AVDD
1.9-V analog supply
1.8
1.9
2.0 V
DVDD
1.9-V digital supply
1.7
1.9
2.0 V
IOVDD
1.15-V SERDES supply
1.1
1.15
1.2 V
I_AVDD3V
I_AVDD
I_DVDD
3.0-V analog supply current
1.9-V analog supply current
1.9-V digital supply current
V_IN = full-scale on both channels
V_IN = full-scale on both channels
Eight lanes active
(LMFS = 8224)
247
310 mA
260
410 mA
137
210 mA
I_IOVDD
1.15-V SERDES supply current
Eight lanes active
(LMFS = 8224)
382
720 mA
P_dis
Total power dissipation
Eight lanes active
(LMFS = 8224)
1.94
2.68 W
I_DVDD
1.9-V digital supply current
Four lanes active (LMFS = 4222),
2X decimation
130
mA
I_IOVDD
1.15-V SERDES supply current
Four lanes active (LMFS = 4222),
2X decimation
404
mA
P_dis
Total power dissipation
Four lanes active (LMFS = 4222),
2X decimation
1.95
W
I_DVDD
1.9-V digital supply current
Two lanes active (LMFS = 2221),
4X decimation
129
mA
I_IOVDD
1.15-V SERDES supply current
Two lanes active (LMFS = 2221),
4X decimation
400
mA
P_dis ⁽¹⁾
Total power dissipation
Two lanes active (LMFS = 2221),
4X decimation
1.94
W
Global power-down power dissipation
285
315 mW
ANALOG INPUTS (INAP, INAM, INBP, INBM)
Differential input full-scale voltage
V_IC
Common-mode input voltage
R_IN
Differential input resistance
At 170-MHz input frequency
C_IN
Differential input capacitance
At 170-MHz input frequency
Analog input bandwidth (3 dB)
50-Ω source driving ADC inputs
terminated with 50 Ω
1.9
V_PP
2.0
V
0.6
kΩ
4.7
pF
1.2
GHz
CLOCK INPUT (CLKINP, CLKINM)
Internal clock biasing
CLKINP and CLKINM are
connected to internal biasing
voltage through 400 Ω
1.15
V
(1) See the Power-Down Mode section for details.
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