TM4C1236H6PM Datasheet, PDF (675/1236 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1236H6PM Microcontroller
Bit/Field
7
6
5
4
3:2
Name
reserved
TAPWML
TAOTE
RTCEN
TAEVENT
Type
RO
RW
RW
RW
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM Timer A PWM Output Level
The TAPWML values are defined as follows:
Value Description
0 Output is unaffected.
1 Output is inverted.
0
GPTM Timer A Output Trigger Enable
The TAOTE values are defined as follows:
Value Description
0 The output Timer A ADC trigger is disabled.
1 The output Timer A ADC trigger is enabled.
Note:
The timer must be configured for one-shot or periodic
time-out mode to produce an ADC trigger assertion.
The GPTM does not generate triggers for match,
compare events or compare match events.
In addition, the ADC must be enabled and the timer selected as a trigger
source with the EMn bit in the ADCEMUX register (see page 769).
0
GPTM RTC Stall Enable
The RTCEN values are defined as follows:
Value Description
0 RTC counting freezes while the processor is halted by the
debugger.
1 RTC counting continues while the processor is halted by the
debugger.
If the RTCEN bit is set, it prevents the timer from stalling in all operating
modes, even if TnSTALL is set.
0x0
GPTM Timer A Event Mode
The TAEVENT values are defined as follows:
Value Description
0x0 Positive edge
0x1 Negative edge
0x2 Reserved
0x3 Both edges
Note:
If PWM output inversion is enabled, edge detection interrupt
behavior is reversed. Thus, if a positive-edge interrupt trigger
has been set and the PWM inversion generates a postive
edge, no event-trigger interrupt asserts. Instead, the interrupt
is generated on the negative edge of the PWM signal.
June 12, 2014
675
Texas Instruments-Production Data