TM4C1230H6PM Datasheet, PDF (671/1104 Pages) Texas Instruments – Tiva™ TM4C1230H6PM Microcontroller

Tiva^™ TM4C1230H6PM Microcontroller
Bit/Field
11
10
9
8
7:5
Name
TBMRIS
CBERIS
CBMRIS
TBTORIS
reserved
Type
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
Description
GPTM Timer B Match Raw Interrupt
Value Description
0 The match value has not been reached.
1 The TBMIE bit is set in the GPTMTBMR register, and the match
values in the GPTMTBMATCHR and (optionally) GPTMTBPMR
registers have been reached when configured in one-shot or
periodic mode.
This bit is cleared by writing a 1 to the TBMCINT bit in the GPTMICR
register.
GPTM Timer B Capture Mode Event Raw Interrupt
Value Description
0 The capture mode event for Timer B has not occurred.
1 A capture mode event has occurred for Timer B. This interrupt
asserts when the subtimer is configured in Input Edge-Time
mode or when configured in PWM mode with the PWM interrupt
enabled by setting the TBPWMIE bit in the GPTMTBMR.
This bit is cleared by writing a 1 to the CBECINT bit in the GPTMICR
register.
GPTM Timer B Capture Mode Match Raw Interrupt
Value Description
0 The capture mode match for Timer B has not occurred.
1 The capture mode match has occurred for Timer B. This interrupt
asserts when the values in the GPTMTBR and GPTMTBPR
match the values in the GPTMTBMATCHR and GPTMTBPMR
when configured in Input Edge-Time mode.
This bit is cleared by writing a 1 to the CBMCINT bit in the GPTMICR
register.
GPTM Timer B Time-Out Raw Interrupt
Value Description
0 Timer B has not timed out.
1 Timer B has timed out. This interrupt is asserted when a
one-shot or periodic mode timer reaches it's count limit (0 or
the value loaded into GPTMTBILR, depending on the count
direction).
This bit is cleared by writing a 1 to the TBTOCINT bit in the GPTMICR
register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
June 12, 2014
671
Texas Instruments-Production Data