PCI2040_06 Datasheet, PDF (66/78 Pages) Texas Instruments – PCI2040 PCI-DSP Bridge Controller

12. Same as Step 3.
13. Same as Step 4.
14. Same as Step 5 except the data latched is DDh and the HCS1 is deasserted indicating the end of the
transaction.
1
2
PCI_CLK
HRST1
HCS1
HAD[15:0]
HCNTL0
HCNTL1
HWIL
HDS
HR/W
HRDY5X1
3
45
XXAA
6
7
8
XXBB
9 10 11 12 13 14
XXCC
XXDD
Figure 6−4. Doubleword Write To HPID Without Auto-Increment Enabled
6.2.7.4 PCI Double Word Read
The fourth example is very similar to the third example. In this case the transaction is a PCI doubleword read. The
steps involved in performing this translation are very similar to the doubleword write example. The important thing
to note is a read from the HPID with auto-increment selected causes the HPIA to be post-incremented.
1
PCI_CLK
234
56
7
8
9 10 11 12 13 14
HRST
HCS
HAD[15:0]
ZZZZ
ZZAA
ZZBB
ZZCC
ZZDD
HCNTL0
HCNTL1
HWIL
HDS
HR/W
HRDY5X
Figure 6−5. Doubleword Read From HPID Without Auto-Increment Enabled
6.3 C6X HPI Interface
The HPI interface for C6x is similar to C54x HPI port except for the following:
6.3.1 No SAM or HOM Modes
The C6x HPI interface has only one mode of operation which does not support C54x SAM or HOM.
6−8