LM3S5G56 Datasheet, PDF (636/1146 Pages) Texas Instruments – Stellaris® LM3S5G56 Microcontroller

Universal Asynchronous Receivers/Transmitters (UARTs)
Bit/Field
5
4
3
2:0
Name
TXFF
RXFE
BUSY
reserved
Type
RO
RO
RO
RO
Reset
0
Description
UART Transmit FIFO Full
The meaning of this bit depends on the state of the FEN bit in the
UARTLCRH register.
Value Description
1 If the FIFO is disabled (FEN is 0), the transmit holding register
is full.
If the FIFO is enabled (FEN is 1), the transmit FIFO is full.
0 The transmitter is not full.
1
UART Receive FIFO Empty
The meaning of this bit depends on the state of the FEN bit in the
UARTLCRH register.
Value Description
1 If the FIFO is disabled (FEN is 0), the receive holding register
is empty.
If the FIFO is enabled (FEN is 1), the receive FIFO is empty.
0 The receiver is not empty.
0
UART Busy
Value Description
1 The UART is busy transmitting data. This bit remains set until
the complete byte, including all stop bits, has been sent from
the shift register.
0 The UART is not busy.
This bit is set as soon as the transmit FIFO becomes non-empty
(regardless of whether UART is enabled).
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
636
January 23, 2012
Texas Instruments-Production Data