LMK04906 Datasheet, PDF (61/117 Pages) Texas Instruments – Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs

LMK04906
Field Name
DAC_HIGH_TRIP
DAC_LOW_TRIP
EN_VTUNE_RAIL_DET
MAN_DAC
EN_MAN_DAC
HOLDOVER_DLD_CNT
FORCE_HOLDOVER
XTAL_LVL
Default
Value
(decimal)
Default
State
Field Description
Register ^{Bit Location}
(MSB:LSB)
Voltage from Vcc at which
0
~50 mV from holdover mode is entered if
Vcc EN_VTUNE_RAIL_DAC is
enabled.
R14
19:14 [6]
Voltage from GND at which
0
~50 mV from holdover mode is entered if
GND EN_VTUNE_RAIL_DAC is
enabled.
R14
11:6 [6]
0
Disabled
Enable PLL1 unlock state when
DAC trip points are achieved
R14
5
Writing to this register will set the
value for DAC when in manual
512
3 V / 2 override.
R15 31:22 [10]
Readback from this register is
DAC value.
0
Disabled Set manual DAC override
R15
20
Lock must be valid n many clocks
512 512 counts of PLL1 PDF before holdover
R15
mode is exited.
19:6 [14]
0
Holdover not
forced
Forces holdover mode.
R15
5
0
1.65 Vpp Sets drive power level of Crystal R16
31:30 [2]
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