ADC12D1000_15 Datasheet, PDF (61/86 Pages) Texas Instruments – GSPS Ultra High-Speed ADC

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ADC12D1000, ADC12D1600
SNAS480N – MAY 2010 – REVISED AUGUST 2015
A buffered version of the internal bandgap reference voltage is made available at the V_BG Pin for the user. The
V_BG pin can drive a load of up to 80 pF and source or sink up to 100 μA. It should be buffered if more current
than this is required. This pin remains as a constant reference voltage regardless of what full-scale range is
selected and may be used for a system reference. V_BG is a dual-purpose pin and it may also be used to select a
higher LVDS output common-mode voltage; see LVDS Output Common-Mode Pin (V_BG).
8.1.1.4 Out-of-Range Indication
Differential input signals are digitized to 12 bits, based on the full-scale range. Signal excursions beyond the full-
scale range, that is, greater than +V_{IN_FSR}/2 or less than -V_{IN_FSR}/2, will be clipped at the output. An input signal
which is above the FSR will result in all 1's at the output and an input signal which is below the FSR will result in
all 0's at the output. When the conversion result is clipped for the I-channel input, the Out-of-Range I-channel
(ORI) output is activated such that ORI+ goes high and ORI- goes low while the signal is out of range. This
output is active as long as accurate data on either or both of the buses would be outside the range of 000h to
FFFh. The Q-channel has a separate ORQ which functions similarly.
8.1.1.5 Maximum Input Range
The recommended operating and absolute maximum input range may be found in Recommended Operating
Conditions and Absolute Maximum Ratings, respectively. Under the stated allowed operating conditions, each
Vin+ and Vin- input pin may be operated in the range from 0 V to 2.15 V if the input is a continuous 100% duty
cycle signal and from 0 V to 2.5 V if the input is a 10% duty cycle signal. The absolute maximum input range for
Vin+ and Vin- is from –0.15 V to 2.5 V. These limits apply only for input signals for which the input common-
mode voltage is properly maintained.
8.1.1.6 AC-Coupled Input Signals
The ADC12D1x00 analog inputs require a precise common-mode voltage. This voltage is generated on-chip
when AC-coupling Mode is selected. See AC-DC-Coupled Mode Pin (V_CMO) for more information about how to
select AC-coupled Mode.
In AC-coupled Mode, the analog inputs must of course be AC-coupled. For an ADC12D1x00 used in a typical
application, this may be accomplished by on-board capacitors, as shown in Figure 67. For the ADC12D1x00RB,
the SMA inputs on the Reference Board are directly connected to the analog inputs on the ADC12D1x00, so this
may be accomplished by DC blocks (included with the hardware kit).
When the AC-coupled Mode is selected, an analog input channel that is not used (for example, in DES Mode)
should be connected to AC ground, for example, through capacitors to ground. Do not connect an unused analog
input directly to ground.
C_couple
C_couple
V_IN+
V_IN-
V_CMO
ADC12D1XXX
Figure 67. AC-Coupled Differential Input
The analog inputs for the ADC12D1x00 are internally buffered, which simplifies the task of driving these inputs
and the RC pole which is generally used at sampling ADC inputs is not required. If the user desires to place an
amplifier circuit before the ADC, care should be taken to choose an amplifier with adequate noise and distortion
performance, and adequate gain at the frequencies used for the application.
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