ADC12D1000_15 Datasheet, PDF (41/86 Pages) Texas Instruments – GSPS Ultra High-Speed ADC

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ADC12D1000, ADC12D1600
SNAS480N – MAY 2010 – REVISED AUGUST 2015
7.3 Feature Description
The ADC12D1x00 offers many features to make the device convenient to use in a wide variety of applications.
Table 1 is a summary of the features available, as well as details for the control mode chosen. "N/A" means "Not
Applicable."
Table 1. Features and Modes
FEATURE
NON-ECM
INPUT CONTROL AND ADJUST
AC-DC-coupled Mode Selection
Selected through V_CMO
(Pin C2)
CONTROL PIN
ACTIVE IN
ECM
Yes
Input Full-scale Range Adjust
Selected through FSR
(Pin Y3)
No
Input Offset Adjust Setting
Not available
N/A
DES/Non-DES Mode Selection
Selected through DES
(Pin V5)
No
DES Timing Adjust
Not available
N/A
Sampling Clock Phase Adjust
Not available
N/A
OUTPUT CONTROL AND ADJUST
DDR Clock Phase Selection
Selected through
DDRPh (Pin W4)
No
LVDS Differential Voltage
Amplitude Selection
Higher amplitude only
N/A
LVDS Common-Mode Voltage Selected through V_BG
Amplitude Selection
(Pin B1)
Yes
Output Formatting Selection
Offset Binary only
N/A
Test Pattern Mode at Output
Selected through TPM
(Pin A4)
No
Demux/Non-Demux Mode
Selection
Selected through NDM
(Pin A5)
Yes
AutoSync
Not available
N/A
DCLK Reset
Not available
N/A
Time Stamp
Not available
N/A
CALIBRATION
On-command Calibration
Selected through CAL
(Pin D6)
Yes
Power-on Calibration Delay
Selection
Selected through
CalDly
(Pin V4)
Yes
Calibration Adjust
Not available
N/A
Read/Write Calibration Settings
Not available
N/A
ECM
Not available
Selected through the Config
Reg
(Addr: 3h and Bh)
Selected through the Config
Reg
(Addr: 2h and Ah)
Selected through the DES Bit
(Addr: 0h; Bit: 7)
Selected through the DES
Timing Adjust Reg
(Addr: 7h)
Selected through the Config
Reg
(Addr: Ch and Dh)
Selected through the DPS Bit
(Addr: 0h; Bit: 14)
Selected through the OVS Bit
(Addr: 0h; Bit: 13)
Not available
Selected through the 2SC Bit
(Addr: 0h; Bit: 4)
Selected through the TPM Bit
(Addr: 0h; Bit: 12)
Not available
Selected through the Config
Reg
(Addr: Eh)
Selected through the Config
Reg
(Addr: Eh; Bit: 0)
Selected through the TSE Bit
(Addr: 0h; Bit: 3)
Selected through the CAL Bit
(Addr: 0h; Bit: 15)
Not available
Selected through the Config
Reg
(Addr: 4h)
Selected through the SSC Bit
(Addr: 4h; Bit: 7)
DEFAULT ECM STATE
N/A
Mid FSR value
Offset = 0 mV
Non-DES Mode
Mid skew offset
t_AD adjust disabled
0° Mode
Higher amplitude
N/A
Offset Binary
TPM disabled
N/A
Master Mode,
RCOut1/2 disabled
DCLK Reset disabled
Time Stamp disabled
N/A
(CAL = 0)
N/A
t_CAL
R/W calibration values
disabled
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