THS6132_14 Datasheet, PDF (6/26 Pages) Texas Instruments – HIGH EFFICIENCY CLASS-G ADSL LINE DRIVER

THS6132
SLLS543A − SEPTEMBER 2002 − REVISED FEBRUARY 2003
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ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, TA = 25°C,VCC(H) = ±15 V, VCC(L) = ±5 V RF = 1.5 kΩ, Gain = +10, Full Bias Mode, RL
= 50 Ω (unless otherwise noted)
INPUT CHARACTERISTICS
PARAMETER
V_ICR Input common−mode voltage range(1)
REF pin input voltage range
CMRR Common-mode rejection ratio
R_I
Input resistance
C_I
Differential Input capacitance
TEST CONDITIONS
VCC(L) = ±5 V
VCC(L) = ±6 V
VCC−(L)= ±5 V
VCC(L) = ±6 V
VCC(L) = ±5 V, ±6 V
+ Input
TA = 25°C
TA = full range
TA = 25°C
TA = 25°C
TA = full range
− Input
MIN TYP MAX UNIT
±2.7 ±3.0
±2.6
V
±4.0
±2.5
V
±3.5
60
67
dB
57
800
kΩ
45
Ω
1.2
pF
(1) To conserve as much power as possible, the input stage of the THS6132 is powered from the VCC(L) supplies and is limited by the VCC(L) supply
voltage. For Class-AB operation, connect the VCC(L) supplies to VCC(H).
LOGIC CONTROL CHARACTERISTICS
PARAMETER
VIH
Bias pin voltage for logic 1
VIL
Bias pin voltage for logic 0
IIH
Bias pin current for logic 1
IIL
Bias pin current for logic 0
Transition time—logic 0 to logic 1(1)
Transition time—logic 1 to logic 0(1)
DGND useable range
TEST CONDITIONS
Relative to DGND pin voltage
Relative to DGND pin voltage
VIH = 5 V, DGND = 0 V
VIL = 0 V, DGND = 0 V
MIN
2.0
−VCC(H)
TYP
−0.1
−0.1
0.1
0.2
MAX
0.8
−0.2
−0.2
+VCC(H) −5
UNIT
V
V
µA
µA
µs
µs
V
(1) Transition time is defined as the time from when the logic signal is applied to the time when the supply current has reached half its final value.
LOGIC TABLE
BIAS-1 BIAS-2
1
1
1
0
1
0
0
1
0
0
BIAS-3
X(1)
1
0
X(1)
X(1)
FUNCTION
Full bias mode
Mid bias mode
Low bias mode
Terminate mode
Shutdown mode
DESCRIPTION
Amplifiers ON with lowest distortion possible
Amplifiers ON with power savings with a reduction in distortion performance
Amplifiers ON with enhanced power savings and a reduction of distortion performance
Lowest power state with +Vin pins internally connect to REF pin and output has low impedance
Amplifiers OFF and output has high impedance
(1) _{X is used to denote a logic state of either 1 or 0.}
NOTE: The default state for all logic pins is a logic one (1).
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