THS6132_14 Datasheet, PDF (14/26 Pages) Texas Instruments – HIGH EFFICIENCY CLASS-G ADSL LINE DRIVER

THS6132
SLLS543A − SEPTEMBER 2002 − REVISED FEBRUARY 2003
DIFFERENTIAL DISTORTION
vs
FREQUENCY
−20
Gain =5
−30 _{Mid Bias}
−40 ^{VO = 2 VPP}
Rf = 1 kΩ
−50 RL= 25 Ω
HD3
−60
−70 _HD2
−80
−90
−100
−110
100 k
VCCH = ±15 V
VCCL = ±5 V
1M
10 M
f − Frequency − Hz
100 M
Figure 50
DIFFERENTIAL DISTORTION
vs
FREQUENCY
−20
Gain =5
−30 _{Low Bias}
−40 ^{VO = 2 VPP}
Rf = 1 kΩ
−50 RL= 25 Ω
HD3
−60
−70 _HD2
−80
−90
−100
−110
100 k
VCCH = ±15 V
VCCL = ±5 V
1M
10 M
f − Frequency − Hz
100 M
Figure 51
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−50
Gain =5
−55 Full Bias
Rf = 1 kΩ
−60 _{RL= 25 Ω}
f = 1 MHz
−65
VCCH = ±15 V
VCCL = ±5 V
−70
HD2
−75
−80
HD3
−85
−90
1 3 5 7 9 11 13 15
Differential Output Voltage − VPP
Figure 53
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−65
Gain =5
−70 Full Bias
Rf = 1 kΩ
−75 RL= 100 Ω
f = 1 MHz
−80
−85
VCCH = ±15 V
VCCL = ±5 V
HD2
−90
−95
HD3
−100
−105
0
5 10 15 20 25 30 35 40
Differential Output Voltage − VPP
Figure 56
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−50
Gain =5
−55 Mid Bias
Rf = 1 kΩ
−60 _{RL= 25 Ω}
f = 1 MHz
−65
VCCH = ±15 V
VCCL = ±5 V
−70
HD2
−75
−80
HD3
−85
−90
1 3 5 7 9 11 13 15
Differential Output Voltage − VPP
Figure 54
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−65
Gain =5
−70 Mid Bias
Rf = 1 kΩ
−75 RL= 100 Ω
f = 1 MHz
−80
VCCH = ±15 V
VCCL = ±5 V
HD2
−85
−90
−95
HD3
−100
−105
0
5 10 15 20 25 30 35 40
Differential Output Voltage − VPP
Figure 57
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DIFFERENTIAL DISTORTION
vs
FREQUENCY
−20
Gain =5
−30 _{Full Bias}
−40 ^{VO = 2 VPP}
Rf = 1 kΩ
−50 RL= 25 Ω
HD3
−60
−70 _HD2
−80
−90
−100
−110
100 k
VCCH = ±15 V
VCCL = ±15 V
1M
10 M
f − Frequency − Hz
100 M
Figure 52
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−50
Gain =5
−55 Low Bias
Rf = 1 kΩ
−60 _{RL= 25 Ω}
f = 1 MHz
−65
VCCH = ±15 V
VCCL = ±5 V
−70
HD2
−75
HD3
−80
−85
−90
1 3 5 7 9 11 13 15
Differential Output Voltage − VPP
Figure 55
DIFFERENTIAL DISTORTION
vs
DIFFERENTIAL OUTPUT VOLTAGE
−65
Gain =5
−70 Low Bias
Rf = 1 kΩ
−75 RL= 100 Ω
f = 1 MHz
VCCH = ±15 V
VCCL = ±5 V
−80
HD2
−85
−90
HD3
−95
−100
−105
0
10
20
30
40
Differential Output Voltage − VPP
Figure 58
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